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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id 196sm1759701ljf.5.2016.07.21.05.40.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Jul 2016 05:40:46 -0700 (PDT) From: Grzegorz Jaszczyk To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 08/18] ARM: mvebu: a39x: Enable PMU, CA9 MPcore SoC Controller and Coherency fabric Date: Thu, 21 Jul 2016 14:44:05 +0200 Message-Id: <1469105055-25181-10-git-send-email-jaz@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1469105055-25181-1-git-send-email-jaz@semihalf.com> References: <1469105055-25181-1-git-send-email-jaz@semihalf.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160721_054109_895806_0DBA4746 X-CRM114-Status: UNSURE ( 8.90 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, andrew@lunn.ch, jason@lakedaemon.net, jaz@semihalf.com, linux@armlinux.org.uk, alior@marvell.com, robh+dt@kernel.org, gregory.clement@free-electrons.com, mw@semihalf.com, thomas.petazzoni@free-electrons.com, sebastian.hesselbarth@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This commit enables: - CA9's Performance Monitor Unit - CA9 MPcore SoC Controller - Coherency fabric on Armada 39x, basing on the Armada 38x (which has the same CA9 CPU). Signed-off-by: Grzegorz Jaszczyk Reviewed-by: Lior Amsalem --- arch/arm/boot/dts/armada-39x.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi index cb66f20..8a22c02 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -78,6 +78,11 @@ }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + soc { compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus", "simple-bus"; @@ -322,6 +327,16 @@ reg = <0x20800 0x10>; }; + mpcore-soc-ctrl@20d20 { + compatible = "marvell,armada-380-mpcore-soc-ctrl"; + reg = <0x20d20 0x6c>; + }; + + coherency-fabric@21010 { + compatible = "marvell,armada-380-coherency-fabric"; + reg = <0x21010 0x1c>; + }; + pmsu@22000 { compatible = "marvell,armada-390-pmsu", "marvell,armada-380-pmsu";