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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id 196sm1759701ljf.5.2016.07.21.05.40.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Jul 2016 05:40:50 -0700 (PDT) From: Grzegorz Jaszczyk To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 10/18] ARM: mvebu: a39x: enable watchdog for all Armada-39x SoCs Date: Thu, 21 Jul 2016 14:44:07 +0200 Message-Id: <1469105055-25181-12-git-send-email-jaz@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1469105055-25181-1-git-send-email-jaz@semihalf.com> References: <1469105055-25181-1-git-send-email-jaz@semihalf.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160721_054111_727421_68E5B5B8 X-CRM114-Status: UNSURE ( 9.15 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, andrew@lunn.ch, jason@lakedaemon.net, jaz@semihalf.com, linux@armlinux.org.uk, alior@marvell.com, robh+dt@kernel.org, gregory.clement@free-electrons.com, mw@semihalf.com, thomas.petazzoni@free-electrons.com, sebastian.hesselbarth@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Grzegorz Jaszczyk Reviewed-by: Lior Amsalem Acked-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-39x.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi index 03dc0ec..5e01438 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -322,6 +322,14 @@ clock-names = "nbclk", "fixed"; }; + watchdog@20300 { + compatible = "marvell,armada-380-wdt"; + reg = <0x20300 0x34>, <0x20704 0x4>, + <0x18260 0x4>; + clocks = <&coreclk 2>, <&refclk>; + clock-names = "nbclk", "fixed"; + }; + cpurst@20800 { compatible = "marvell,armada-370-cpu-reset"; reg = <0x20800 0x10>; @@ -534,5 +542,12 @@ #clock-cells = <0>; clock-frequency = <1000000000>; }; + + /* 25 MHz reference crystal */ + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; }; };