From patchwork Thu Jul 21 12:44:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grzegorz Jaszczyk X-Patchwork-Id: 9241629 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 017EE602F0 for ; Thu, 21 Jul 2016 12:53:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E68C726242 for ; Thu, 21 Jul 2016 12:53:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DB69127EE2; Thu, 21 Jul 2016 12:53:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 77C5926242 for ; Thu, 21 Jul 2016 12:53:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bQDSd-0005Hs-N2; Thu, 21 Jul 2016 12:52:19 +0000 Received: from mail-lf0-x229.google.com ([2a00:1450:4010:c07::229]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bQDI8-0001uJ-Gv for linux-arm-kernel@lists.infradead.org; Thu, 21 Jul 2016 12:41:30 +0000 Received: by mail-lf0-x229.google.com with SMTP id b199so60879595lfe.0 for ; Thu, 21 Jul 2016 05:41:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OZTFblykdeku9Aoa6fU64e36k9t0L8/hdlYxjKYWk7I=; b=KUrH85n4LAUO4yczEfkKWIaLyUPdbmbXYQ7rLDKsgyTeGO2S8OkLuyFga0A48yhje5 Sg1RXzBbp9OCST/LvvPMP+REvxU+Hly7XYH676eVaCWFiSOpvXNva8tZhs6DapayTmao bncReORqoaP91GDNiyBFyClOw/vBCkABYuZQycmj2SRlI+RcH5mztp6Wj0mn/Iwbh3DH t9zV+qXfZXGtY2I673aqgYrUZYiup9ThFqk1QOH2bpCu/NLqOEvQrD6NnERXfJ7tyZfM kv1oPYzoy9PkSGrq5Gnuxg/lTAgnAZccF3GIU/wXH/5dJingQULehyI2/LJJLNNyFEXz EqsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OZTFblykdeku9Aoa6fU64e36k9t0L8/hdlYxjKYWk7I=; b=l9e9JSvk3KUZQCQR3MFZcgwH6OSkaElgxLCOidWSWZWOoL2J9ooK+W2VJSuDSK7hNM KgYIIxOM545xP3+yOoU/1r3ZvOA1hq7oJ2vE+Ht2G6Tjci+ra0A17lROUSMF9tUf9qpP /1Goiuh8Zd1parM1uRlaI5qZV8VaYpqi2QTnoDodsj0aCXy83Nvfkt8XpRtbYdsx++ym hnJpRnj2QX0sYkCABfOUc6rIGrQNX2zonH66omErZaI8MrvTVlLgdRrehnqAuyb4Qr0I 51TQX/cTtX7IZ0EmSfGeNcpcgcjA3E5us+MfFEvJDPUFtsZhn+gLJ1ei28fHYDG0eK3l oT8w== X-Gm-Message-State: ALyK8tK57SPvRohOgyuh776mxvuw8bExvZsRSUCqphJoDBT5B4272LAdDxFODx+yS2h0Yw== X-Received: by 10.46.9.9 with SMTP id 9mr19036927ljj.3.1469104866505; Thu, 21 Jul 2016 05:41:06 -0700 (PDT) Received: from enkidu.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id 196sm1759701ljf.5.2016.07.21.05.41.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Jul 2016 05:41:05 -0700 (PDT) From: Grzegorz Jaszczyk To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 18/18] ARM: mvebu: a395-gp: add support for the Armada 395 GP Board Date: Thu, 21 Jul 2016 14:44:15 +0200 Message-Id: <1469105055-25181-20-git-send-email-jaz@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1469105055-25181-1-git-send-email-jaz@semihalf.com> References: <1469105055-25181-1-git-send-email-jaz@semihalf.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160721_054128_943102_EF60B713 X-CRM114-Status: GOOD ( 17.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, andrew@lunn.ch, jason@lakedaemon.net, jaz@semihalf.com, linux@armlinux.org.uk, alior@marvell.com, robh+dt@kernel.org, gregory.clement@free-electrons.com, mw@semihalf.com, thomas.petazzoni@free-electrons.com, sebastian.hesselbarth@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This commit adds description for the following features for this board: - Serial port - PCIe interfaces - USB2.0 - USB3.0 - SDIO - 1024 MiB NAND-FLASH - SATA - I2C buses Signed-off-by: Grzegorz Jaszczyk Acked-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-395-gp.dts | 147 ++++++++++++++++++++++++++++++++++++ 1 file changed, 147 insertions(+) create mode 100644 arch/arm/boot/dts/armada-395-gp.dts diff --git a/arch/arm/boot/dts/armada-395-gp.dts b/arch/arm/boot/dts/armada-395-gp.dts new file mode 100644 index 0000000..eb53306 --- /dev/null +++ b/arch/arm/boot/dts/armada-395-gp.dts @@ -0,0 +1,147 @@ +/* + * Device Tree file for Marvell Armada 395 GP board + * + * Copyright (C) 2016 Marvell + * + * Grzegorz Jaszczyk + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "armada-395.dtsi" + +/ { + model = "Marvell Armada 395 GP Board"; + compatible = "marvell,a395-gp", "marvell,armada395", + "marvell,armada390"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x40000000>; /* 1 GB */ + }; + + soc { + ranges = ; + + internal-regs { + i2c@11000 { + status = "okay"; + clock-frequency = <100000>; + }; + + serial@12000 { + status = "okay"; + }; + + usb@58000 { + status = "okay"; + }; + + sata@a8000 { + status = "okay"; + }; + + flash@d0000 { + status = "okay"; + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + num-cs = <1>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "U-Boot"; + reg = <0x00000000 0x00600000>; + read-only; + }; + + partition@800000 { + label = "uImage"; + reg = <0x00600000 0x00400000>; + read-only; + }; + + partition@1000000 { + label = "Root"; + reg = <0x00a00000 0x3f600000>; + }; + }; + }; + + sdhci@d8000 { + clock-frequency = <200000000>; + broken-cd; + wp-inverted; + bus-width = <8>; + status = "okay"; + no-1-8-v; + }; + + usb3@f0000 { + status = "okay"; + }; + }; + + pcie-controller { + status = "okay"; + + /* + * The two PCIe units are accessible through + * mini PCIe slot on the board. + */ + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; + + pcie@4,0 { + /* Port 3, Lane 0 */ + status = "okay"; + }; + }; + }; +};