From patchwork Fri Jul 22 09:07:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: huang lin X-Patchwork-Id: 9243273 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 047A2602F0 for ; Fri, 22 Jul 2016 09:09:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E51E3223A4 for ; Fri, 22 Jul 2016 09:09:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D97D127F9A; Fri, 22 Jul 2016 09:09:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5DC50223A4 for ; Fri, 22 Jul 2016 09:09:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bQWRD-0005eW-LL; Fri, 22 Jul 2016 09:08:07 +0000 Received: from mail-pa0-f67.google.com ([209.85.220.67]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bQWR6-0005ZN-82; Fri, 22 Jul 2016 09:08:02 +0000 Received: by mail-pa0-f67.google.com with SMTP id ez1so6664380pab.3; Fri, 22 Jul 2016 02:07:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=21DKbLIskPwdTzivPaZd9f57XUVn5RW2tDeFLGOhfpY=; b=bFRoEp0gBEL0ps/hokzbpSI3/zokm+M/HvD5WQDfzspBULUvPkrsNB72T/WkVH6UAt sQYNYl7ibnvhJTnmvf2WeEx9d7SYWfiyIUPSvzI0OaAKBNWPG4oPye9cEzsq3MsHDKwY uzTjYdeT7N6jloecFdv8jWxy0MOmER82ZG0oQURNUd2WENIOEVYyLVwDs9497vYYRfLT zBycC0cFoYtYZYQVEdyFg9R3StVV5GNSqtnsZwTwYUMLebtlZw6B0gzTdpdlA5hL5DCv ExONW1uT66NPFpehAnqAfsu2AsdfvNEQbOwygBnP4eSNkB0vSrQxD2GLyePHqaTgTVAc 0V+w== X-Gm-Message-State: AEkoouu3fzmFEITLrVJ5b23HYYG0CYf8c/tNv4hLfP2FSGhwi+ZMXo7ENlxlKlPIMCABNA== X-Received: by 10.66.170.44 with SMTP id aj12mr4570804pac.131.1469178459111; Fri, 22 Jul 2016 02:07:39 -0700 (PDT) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id i137sm18130320pfe.64.2016.07.22.02.07.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 22 Jul 2016 02:07:38 -0700 (PDT) From: Lin Huang To: heiko@sntech.de Subject: [PATCH v3 1/7] firmware: rockchip: sip: Add rockchip SIP runtime service Date: Fri, 22 Jul 2016 17:07:14 +0800 Message-Id: <1469178440-4668-2-git-send-email-hl@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1469178440-4668-1-git-send-email-hl@rock-chips.com> References: <1469178440-4668-1-git-send-email-hl@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160722_020800_458756_E6B8F922 X-CRM114-Status: GOOD ( 15.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tixy@linaro.org, typ@rock-chips.com, Lin Huang , linux-rockchip@lists.infradead.org, airlied@linux.ie, mturquette@baylibre.com, dbasehore@chromium.org, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, dianders@chromium.org, xsf@rock-chips.com, cw00.choi@samsung.com, kyungmin.park@samsung.com, myungjoo.ham@samsung.com, linux-arm-kernel@lists.infradead.org, mark.yao@rock-chips.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shengfei xu This patch adds support for the SiP interface, we can pass dram paramtert to bl31, and control ddr frequency scaling in bl31. Signed-off-by: Shengfei xu Signed-off-by: Lin Huang --- Changes in v3: - None Changes in v2: - None Changes in v1: - None drivers/firmware/Kconfig | 7 +++++ drivers/firmware/Makefile | 1 + drivers/firmware/rockchip_sip.c | 64 +++++++++++++++++++++++++++++++++++++++++ drivers/firmware/rockchip_sip.h | 59 +++++++++++++++++++++++++++++++++++++ 4 files changed, 131 insertions(+) create mode 100644 drivers/firmware/rockchip_sip.c create mode 100644 drivers/firmware/rockchip_sip.h diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 0e22f24..6f585c5 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -206,6 +206,13 @@ config QCOM_SCM_64 config HAVE_ARM_SMCCC bool +config ROCKCHIP_SIP + bool "Rockchip SIP interface" + depends on ARM64 && ARM_PSCI_FW + help + Say Y here if you want to enable SIP callbacks for Rockchip platforms + This option enables support for communicating with the ATF. + source "drivers/firmware/broadcom/Kconfig" source "drivers/firmware/google/Kconfig" source "drivers/firmware/efi/Kconfig" diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile index 44a59dc..e9eab5b 100644 --- a/drivers/firmware/Makefile +++ b/drivers/firmware/Makefile @@ -25,3 +25,4 @@ obj-y += broadcom/ obj-$(CONFIG_GOOGLE_FIRMWARE) += google/ obj-$(CONFIG_EFI) += efi/ obj-$(CONFIG_UEFI_CPER) += efi/ +obj-$(CONFIG_ROCKCHIP_SIP) += rockchip_sip.o diff --git a/drivers/firmware/rockchip_sip.c b/drivers/firmware/rockchip_sip.c new file mode 100644 index 0000000..7756af9 --- /dev/null +++ b/drivers/firmware/rockchip_sip.c @@ -0,0 +1,64 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Copyright (C) 2016 ARM Limited + */ +#include +#include +#include +#include +#include +#include "rockchip_sip.h" + +typedef unsigned long (psci_fn)(unsigned long, unsigned long, + unsigned long, unsigned long); +asmlinkage psci_fn __invoke_psci_fn_smc; + +#define CONFIG_DRAM_INIT 0x00 +#define CONFIG_DRAM_SET_RATE 0x01 +#define CONFIG_DRAM_ROUND_RATE 0x02 +#define CONFIG_DRAM_SET_AT_SR 0x03 +#define CONFIG_DRAM_GET_BW 0x04 +#define CONFIG_DRAM_GET_RATE 0x05 +#define CONFIG_DRAM_CLR_IRQ 0x06 +#define CONFIG_DRAM_SET_PARAM 0x07 + +uint64_t sip_smc_ddr_init(void) +{ + return __invoke_psci_fn_smc(SIP_DDR_FREQ, 0, + 0, CONFIG_DRAM_INIT); +} + +uint64_t sip_smc_set_ddr_param(uint64_t param) +{ + return __invoke_psci_fn_smc(SIP_DDR_FREQ, param, + 0, CONFIG_DRAM_SET_PARAM); +} + +uint64_t sip_smc_set_ddr_rate(uint64_t rate) +{ + return __invoke_psci_fn_smc(SIP_DDR_FREQ, rate, 0, + CONFIG_DRAM_SET_RATE); +} + +uint64_t sip_smc_get_ddr_rate(void) +{ + return __invoke_psci_fn_smc(SIP_DDR_FREQ, 0, 0, CONFIG_DRAM_GET_RATE); +} + +uint64_t sip_smc_clr_ddr_irq(void) +{ + return __invoke_psci_fn_smc(SIP_DDR_FREQ, 0, 0, CONFIG_DRAM_CLR_IRQ); +} + +uint64_t sip_smc_get_call_count(void) +{ + return __invoke_psci_fn_smc(SIP_SVC_CALL_COUNT, 0, 0, 0); +} diff --git a/drivers/firmware/rockchip_sip.h b/drivers/firmware/rockchip_sip.h new file mode 100644 index 0000000..6487734 --- /dev/null +++ b/drivers/firmware/rockchip_sip.h @@ -0,0 +1,59 @@ +/* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __SIP_INT_H +#define __SIP_INT_H + +/* SMC function IDs for SiP Service queries */ +#define SIP_SVC_CALL_COUNT 0x8200ff00 +#define SIP_SVC_UID 0x8200ff01 +#define SIP_SVC_VERSION 0x8200ff03 +#define SIP_DDR_FREQ 0xC2000008 + +#if IS_ENABLED(CONFIG_ROCKCHIP_SIP) +uint64_t sip_smc_set_ddr_rate(uint64_t rate); +uint64_t sip_smc_get_ddr_rate(void); +uint64_t sip_smc_clr_ddr_irq(void); +uint64_t sip_smc_get_call_count(void); +uint64_t sip_smc_ddr_init(void); +uint64_t sip_smc_set_ddr_param(uint64_t param); +#else +static inline uint64_t sip_smc_set_ddr_rate(uint64_t rate) +{ + return 0; +} + +static inline uint64_t sip_smc_get_ddr_rate(void) +{ + return 0; +} + +static inline uint64_t sip_smc_clr_ddr_irq(void) +{ + return 0; +} + +static inline uint64_t sip_smc_get_call_count(void) +{ + return 0; +} + +static inline uint64_t sip_smc_ddr_init(void) +{ + return 0; +} + +static inline uint64_t sip_smc_set_ddr_param(uint64_t param) +{ + return 0; +} +#endif +#endif