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[v2,07/17] ARM: dts: mvebu: armada-39x: enable PMU, CA9 SoC Controller and Coherency fabric

Message ID 1470305660-6601-8-git-send-email-jaz@semihalf.com (mailing list archive)
State New, archived
Headers show

Commit Message

Grzegorz Jaszczyk Aug. 4, 2016, 10:14 a.m. UTC 
This commit enables:
- CA9's Performance Monitor Unit
- CA9 MPcore SoC Controller
- Coherency fabric
on Armada 39x, basing on the Armada 38x (which has the same CA9 CPU).

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Lior Amsalem <alior@marvell.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm/boot/dts/armada-39x.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
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Patch

diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index cb66f20..8a22c02 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -78,6 +78,11 @@ 
 		};
 	};
 
+	pmu {
+		compatible = "arm,cortex-a9-pmu";
+		interrupts-extended = <&mpic 3>;
+	};
+
 	soc {
 		compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus",
 			     "simple-bus";
@@ -322,6 +327,16 @@ 
 				reg = <0x20800 0x10>;
 			};
 
+			mpcore-soc-ctrl@20d20 {
+				compatible = "marvell,armada-380-mpcore-soc-ctrl";
+				reg = <0x20d20 0x6c>;
+			};
+
+			coherency-fabric@21010 {
+				compatible = "marvell,armada-380-coherency-fabric";
+				reg = <0x21010 0x1c>;
+			};
+
 			pmsu@22000 {
 				compatible = "marvell,armada-390-pmsu",
 					     "marvell,armada-380-pmsu";