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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id k63sm5708186lfe.48.2016.08.08.05.57.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 Aug 2016 05:57:15 -0700 (PDT) From: Tomasz Nowicki To: helgaas@kernel.org, arnd@arndb.de, will.deacon@arm.com, catalin.marinas@arm.com, rafael@kernel.org, Lorenzo.Pieralisi@arm.com Subject: [RFC PATCH V5 2/5] PCI/ACPI: Move ACPI ECAM mapping to generic MCFG driver Date: Mon, 8 Aug 2016 14:56:39 +0200 Message-Id: <1470661002-26213-3-git-send-email-tn@semihalf.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1470661002-26213-1-git-send-email-tn@semihalf.com> References: <1470661002-26213-1-git-send-email-tn@semihalf.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160808_055738_495244_06A4CAEF X-CRM114-Status: GOOD ( 15.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gabriele.paoloni@huawei.com, linaro-acpi@lists.linaro.org, linux-pci@vger.kernel.org, Liviu.Dudau@arm.com, okaya@codeaurora.org, wangyijing@huawei.com, andrea.gallo@linaro.org, jhugo@codeaurora.org, Tomasz Nowicki , ddaney@caviumnetworks.com, robert.richter@caviumnetworks.com, liudongdong3@huawei.com, msalter@redhat.com, jcm@redhat.com, cov@codeaurora.org, mw@semihalf.com, linux-arm-kernel@lists.infradead.org, jchandra@broadcom.com, ard.biesheuvel@linaro.org, dhdang@apm.com, jeremy.linton@arm.com, hanjun.guo@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP pci_acpi_setup_ecam_mapping() is not really ARM64 specific so move it out of arch/arm64/ directory. In preparation for adding MCFG quirk handling extend pci_acpi_setup_ecam_mapping() functionality to accept custom PCI config accessors (function's argument). For ARM64 ACPI based PCI host controller we still use pci_generic_ecam_ops. Signed-off-by: Tomasz Nowicki --- arch/arm64/kernel/pci.c | 41 ++--------------------------------------- drivers/acpi/pci_mcfg.c | 40 ++++++++++++++++++++++++++++++++++++++++ include/linux/pci-acpi.h | 3 +++ 3 files changed, 45 insertions(+), 39 deletions(-) diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index 981e828..2e7bed4 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -114,44 +114,6 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) return 0; } -/* - * Lookup the bus range for the domain in MCFG, and set up config space - * mapping. - */ -static struct pci_config_window * -pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) -{ - struct resource *bus_res = &root->secondary; - u16 seg = root->segment; - struct pci_config_window *cfg; - struct resource cfgres; - unsigned int bsz; - - /* Use address from _CBA if present, otherwise lookup MCFG */ - if (!root->mcfg_addr) - root->mcfg_addr = pci_mcfg_lookup(seg, bus_res); - - if (!root->mcfg_addr) { - dev_err(&root->device->dev, "%04x:%pR ECAM region not found\n", - seg, bus_res); - return NULL; - } - - bsz = 1 << pci_generic_ecam_ops.bus_shift; - cfgres.start = root->mcfg_addr + bus_res->start * bsz; - cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1; - cfgres.flags = IORESOURCE_MEM; - cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, - &pci_generic_ecam_ops); - if (IS_ERR(cfg)) { - dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n", - seg, bus_res, PTR_ERR(cfg)); - return NULL; - } - - return cfg; -} - /* release_info: free resources allocated by init_info */ static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) { @@ -177,7 +139,8 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) if (!ri) return NULL; - ri->cfg = pci_acpi_setup_ecam_mapping(root); + ri->cfg = pci_acpi_setup_ecam_mapping(root, + &pci_generic_ecam_ops.pci_ops); if (!ri->cfg) { kfree(ri); return NULL; diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c index b5b376e..331b560 100644 --- a/drivers/acpi/pci_mcfg.c +++ b/drivers/acpi/pci_mcfg.c @@ -22,6 +22,7 @@ #include #include #include +#include /* Structure to hold entries from the MCFG table */ struct mcfg_entry { @@ -52,6 +53,45 @@ phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res) return 0; } +/* + * Lookup the bus range for the domain in MCFG, and set up config space + * mapping. + */ +struct pci_config_window * +pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root, struct pci_ops *ops) +{ + struct resource *bus_res = &root->secondary; + u16 seg = root->segment; + struct pci_config_window *cfg; + struct resource cfgres; + struct pci_ecam_ops ecam_ops = { + .bus_shift = 20, + .pci_ops = *ops, + }; + + /* Use address from _CBA if present, otherwise lookup MCFG */ + if (!root->mcfg_addr) + root->mcfg_addr = pci_mcfg_lookup(seg, bus_res); + + if (!root->mcfg_addr) { + dev_err(&root->device->dev, "%04x:%pR ECAM region not found\n", + seg, bus_res); + return NULL; + } + + cfgres.start = root->mcfg_addr + (bus_res->start << 20); + cfgres.end = cfgres.start + (resource_size(bus_res) << 20) - 1; + cfgres.flags = IORESOURCE_MEM; + cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, &ecam_ops); + if (IS_ERR(cfg)) { + dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n", + seg, bus_res, PTR_ERR(cfg)); + return NULL; + } + + return cfg; +} + static __init int pci_mcfg_parse(struct acpi_table_header *header) { struct acpi_table_mcfg *mcfg; diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 7d63a66..e9bfe00 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -26,6 +26,9 @@ extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle); extern phys_addr_t pci_mcfg_lookup(u16 domain, struct resource *bus_res); +extern struct pci_config_window * +pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root, struct pci_ops *ops); + static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev) { struct pci_bus *pbus = pdev->bus;