From patchwork Tue Aug 16 22:36:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: huang lin X-Patchwork-Id: 9284943 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1AFC8607FD for ; Tue, 16 Aug 2016 22:40:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 05C7D285B5 for ; Tue, 16 Aug 2016 22:40:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E8DA628640; Tue, 16 Aug 2016 22:40:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, URIBL_BLACK autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 706CF285B5 for ; Tue, 16 Aug 2016 22:40:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bZn0M-0007QG-D7; Tue, 16 Aug 2016 22:38:42 +0000 Received: from mail-pa0-f66.google.com ([209.85.220.66]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bZmyg-0006Ec-5u; Tue, 16 Aug 2016 22:37:04 +0000 Received: by mail-pa0-f66.google.com with SMTP id vy10so5850148pac.0; Tue, 16 Aug 2016 15:36:42 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WZIziOWsbk3RNkUGvxazcatR46B32VxqVVayFtFOb8Y=; b=L7tQydUY+MAi+aY7RY7P9NX+5LhuMfoT8NlIxcA/8l4Eh+h4YbGofVf0YKEcIQlTwE VEIAo0KyYwS/2QbDvrvANKxM1EOaKLFII/UQo7r3Mn2BV2hvZqaO7eFNrK47J7DjIRl0 esSByne+YBjzfvmscOQYv4KxvWoNhFeg7elpSWJFBFJ8YeqhzE7p94lnie+OOj4uVaDG TBwi6YPSmxVyXkJ44rOI9NXSEQWGZJhSNwZzRDNisdaBC15AFt/5ddMENZJa066j/sox I4t5JfWPeagt9FSKc5JVHFqsjXEx6INzuLoU4wweiotjIkkMlUmqn4Y2N0GXgPr0+P9M ctOw== X-Gm-Message-State: AEkoout3qwbOTSionYpcPh2Pd6bitmSmEawL6LU7rPEthzNLVLUTW3kIxyreX5UXzmRn8Q== X-Received: by 10.66.88.73 with SMTP id be9mr16760469pab.121.1471387001765; Tue, 16 Aug 2016 15:36:41 -0700 (PDT) Received: from hl-ThinkPad-X240.corp.google.com ([172.22.52.196]) by smtp.gmail.com with ESMTPSA id c66sm41753219pfd.24.2016.08.16.15.36.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 Aug 2016 15:36:41 -0700 (PDT) From: Lin Huang To: heiko@sntech.de, myungjoo.ham@samsung.com Subject: [PATCH v6 6/8] Documentation: bindings: add dt documentation for rk3399 dmc Date: Wed, 17 Aug 2016 06:36:27 +0800 Message-Id: <1471386989-9541-7-git-send-email-hl@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471386989-9541-1-git-send-email-hl@rock-chips.com> References: <1471386989-9541-1-git-send-email-hl@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160816_153658_413369_ED429F7F X-CRM114-Status: GOOD ( 11.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tixy@linaro.org, mark.rutland@arm.com, dbasehore@chromium.org, Lin Huang , cw00.choi@samsung.com, airlied@linux.ie, mturquette@baylibre.com, typ@rock-chips.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, dianders@chromium.org, linux-rockchip@lists.infradead.org, kyungmin.park@samsung.com, sudeep.holla@arm.com, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mark.yao@rock-chips.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the documentation for rockchip rk3399 dmc driver. Signed-off-by: Lin Huang --- Changes in v6: -Add more detail in Documentation Changes in v5: -None Changes in v4: -None Changes in v3: -None Changes in v2: -None Changes in v1: -None .../devicetree/bindings/devfreq/rk3399_dmc.txt | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt new file mode 100644 index 0000000..e73067c --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt @@ -0,0 +1,84 @@ +* Rockchip rk3399 DMC(Dynamic Memory Controller) device + +Required properties: +- compatible: Must be "rockchip,rk3399-dmc". +- devfreq-events: Node to get ddr loading, Refer to + Documentation/devicetree/bindings/devfreq/rockchip-dif.txt +- interrupts: The interrupt number to the cpu. The interrupt specifier format + depends on the interrupt controller. it should be dcf interrupts, + when ddr dvfs finish, it will happen. +- clocks: Phandles for clock specified in "clock-names" property +- clock-names : The name of clock used by the DFI, must be "pclk_ddr_mon"; +- operating-points-v2: Refer to Documentation/devicetree/bindings/power/opp.txt + for details. +- center-supply: Dmc supply node. +- status: Marks the node enabled/disabled. + +Optional properties: +- ddr_timing: ddr timing need to pass to arm trust firmware +- upthreshold: the upthreshold to simpleondeamnd policy +- downdifferential: The downdifferential to simpleondeamnd policy + +Example: + ddr_timing: ddr_timing { + compatible = "rockchip,ddr-timing"; + ddr3_speed_bin = <21>; + pd_idle = <0>; + sr_idle = <0>; + sr_mc_gate_idle = <0>; + srpd_lite_idle = <0>; + standby_idle = <0>; + dram_dll_dis_freq = <300>; + phy_dll_dis_freq = <125>; + + ddr3_odt_dis_freq = <333>; + ddr3_drv = ; + ddr3_odt = ; + phy_ddr3_ca_drv = ; + phy_ddr3_dq_drv = ; + phy_ddr3_odt = ; + + lpddr3_odt_dis_freq = <333>; + lpddr3_drv = ; + lpddr3_odt = ; + phy_lpddr3_ca_drv = ; + phy_lpddr3_dq_drv = ; + phy_lpddr3_odt = ; + + lpddr4_odt_dis_freq = <333>; + lpddr4_drv = ; + lpddr4_dq_odt = ; + lpddr4_ca_odt = ; + phy_lpddr4_ca_drv = ; + phy_lpddr4_ck_cs_drv = ; + phy_lpddr4_dq_drv = ; + phy_lpddr4_odt = ; + }; + + dmc_opp_table: dmc_opp_table { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <900000>; + }; + opp01 { + opp-hz = /bits/ 64 <666000000>; + opp-microvolt = <900000>; + }; + }; + + dmc: dmc { + compatible = "rockchip,rk3399-dmc"; + devfreq-events = <&dfi>; + interrupts = ; + clocks = <&cru SCLK_DDRCLK>; + clock-names = "dmc_clk"; + ddr_timing = <&ddr_timing>; + operating-points-v2 = <&dmc_opp_table>; + center-supply = <&ppvar_centerlogic>; + upthreshold = <15>; + downdifferential = <10>; + status = "disabled"; + }; +