diff mbox

ARM: dts: imx6ul: set GINT to enable IOMUXC irq

Message ID 1471969101-12455-1-git-send-email-Anson.Huang@nxp.com (mailing list archive)
State New, archived
Headers show

Commit Message

Anson Huang Aug. 23, 2016, 4:18 p.m. UTC
Add "fsl,imx6q-iomuxc-gpr" for IOMUXC-GPR to enable
IOMUXC irq which is required for ERR007265 software
workaround.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm/boot/dts/imx6ul.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Shawn Guo Aug. 29, 2016, 6:23 a.m. UTC | #1
On Wed, Aug 24, 2016 at 12:18:21AM +0800, Anson Huang wrote:
> Add "fsl,imx6q-iomuxc-gpr" for IOMUXC-GPR to enable
> IOMUXC irq which is required for ERR007265 software
> workaround.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

The patch subject is confusing.  It doesn't match commit log and code
change.

Shawn

> ---
>  arch/arm/boot/dts/imx6ul.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index 33b95d7..acc9486 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -644,7 +644,8 @@
>  			};
>  
>  			gpr: iomuxc-gpr@020e4000 {
> -				compatible = "fsl,imx6ul-iomuxc-gpr", "syscon";
> +				compatible = "fsl,imx6ul-iomuxc-gpr",
> +					     "fsl,imx6q-iomuxc-gpr", "syscon";
>  				reg = <0x020e4000 0x4000>;
>  			};
>  
> -- 
> 1.9.1
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff mbox

Patch

diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 33b95d7..acc9486 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -644,7 +644,8 @@ 
 			};
 
 			gpr: iomuxc-gpr@020e4000 {
-				compatible = "fsl,imx6ul-iomuxc-gpr", "syscon";
+				compatible = "fsl,imx6ul-iomuxc-gpr",
+					     "fsl,imx6q-iomuxc-gpr", "syscon";
 				reg = <0x020e4000 0x4000>;
 			};