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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR03MB2329 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160824_012544_087473_F3E9E6B1 X-CRM114-Status: GOOD ( 15.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fabio.estevam@nxp.com, shawnguo@kernel.org, linux@armlinux.org.uk, kernel@pengutronix.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch enables cpuidle driver for i.MX6UL, it reuses i.MX6SX's cpuidle driver, 3 levels of cpuidle supported: 1. ARM WFI; 2. SOC in WAIT mode; 3. SOC in WAIT mode + ARM power off. As i.MX6UL has cortex-A7 CORE with an internal L2 cache, so need to add L2 cache type check to decide if to flush L2 when entering idle with ARM power off, this is different from i.MX6SX which has PL310 external L2 cache. Signed-off-by: Anson Huang --- arch/arm/mach-imx/cpuidle-imx6sx.c | 10 ++++++++++ arch/arm/mach-imx/mach-imx6ul.c | 3 +++ 2 files changed, 13 insertions(+) diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c index 41cdce6..b4fcc8ae 100644 --- a/arch/arm/mach-imx/cpuidle-imx6sx.c +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c @@ -9,14 +9,21 @@ #include #include #include +#include +#include #include #include #include "common.h" #include "cpuidle.h" +static bool pl310_available; + static int imx6sx_idle_finish(unsigned long val) { + /* check if need to flush internal L2 cache */ + if (!pl310_available) + flush_cache_all(); cpu_do_idle(); return 0; @@ -101,5 +108,8 @@ int __init imx6sx_cpuidle_init(void) imx_gpc_set_arm_power_up_timing(2, 1); imx_gpc_set_arm_power_down_timing(1, 1); + if (of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) + pl310_available = true; + return cpuidle_register(&imx6sx_cpuidle_driver, NULL); } diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c index c2cd61c..9c5e8f3 100644 --- a/arch/arm/mach-imx/mach-imx6ul.c +++ b/arch/arm/mach-imx/mach-imx6ul.c @@ -16,6 +16,7 @@ #include #include "common.h" +#include "cpuidle.h" static void __init imx6ul_enet_clk_init(void) { @@ -80,6 +81,8 @@ static void __init imx6ul_init_irq(void) static void __init imx6ul_init_late(void) { + imx6sx_cpuidle_init(); + if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) { imx6_pm_opp_init(); platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);