From patchwork Thu Sep 1 14:05:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 9309137 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 29281607D6 for ; Thu, 1 Sep 2016 14:09:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EE31529437 for ; Thu, 1 Sep 2016 14:09:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E1ED229439; Thu, 1 Sep 2016 14:09:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3F67529438 for ; Thu, 1 Sep 2016 14:09:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bfSdK-0002zq-P3; Thu, 01 Sep 2016 14:06:22 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bfScz-0002mQ-PU for linux-arm-kernel@lists.infradead.org; Thu, 01 Sep 2016 14:06:06 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id 8E21618AB; Thu, 1 Sep 2016 16:05:40 +0200 (CEST) Received: from quentin-Latitude-E6320.home (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 17F3C1B25; Thu, 1 Sep 2016 16:05:30 +0200 (CEST) From: Quentin Schulz To: jdelvare@suse.com, linux@roeck-us.net, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, maxime.ripard@free-electrons.com, wens@csie.org, lee.jones@linaro.org Subject: [PATCH v4 2/3] mfd: add support for Allwinner SoCs ADC Date: Thu, 1 Sep 2016 16:05:04 +0200 Message-Id: <1472738705-20145-3-git-send-email-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1472738705-20145-1-git-send-email-quentin.schulz@free-electrons.com> References: <1472738705-20145-1-git-send-email-quentin.schulz@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160901_070602_223980_2A764D73 X-CRM114-Status: GOOD ( 23.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thomas.petazzoni@free-electrons.com, linux-hwmon@vger.kernel.org, linux-iio@vger.kernel.org, antoine.tenart@free-electrons.com, linux-kernel@vger.kernel.org, Quentin Schulz , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Allwinner SoCs all have an ADC that can also act as a touchscreen controller and a thermal sensor. For now, only the ADC and the thermal sensor drivers are probed by the MFD, the touchscreen controller support will be added later. Signed-off-by: Quentin Schulz --- v4: - rename files and variables from sunxi* to sun4i*, - rename defines from SUNXI_* to SUN4I_* or SUN6I_*, - remove TP in defines name, - rename SUNXI_IRQ_* to SUN4I_GPADC_IRQ_* for consistency, - use devm functions for regmap_add_irq_chip and mfd_add_devices, - remove remove functions (now empty thanks to devm functions), v3: - use defines in regmap_irq instead of hard coded BITs, - use of_device_id data field to chose which MFD cells to add considering the compatible responsible of the MFD probe, - remove useless initializations, - disable all interrupts before adding them to regmap_irqchip, - add goto error label in probe, - correct wrapping in header license, - move defines from IIO driver to header, - use GENMASK to limit the size of the variable passed to a macro, - prefix register BIT defines with the name of the register, - reorder defines, v2: - add license headers, - reorder alphabetically includes, - add SUNXI_GPADC_ prefixes for defines, drivers/mfd/Kconfig | 15 ++++ drivers/mfd/Makefile | 2 + drivers/mfd/sun4i-gpadc-mfd.c | 174 ++++++++++++++++++++++++++++++++++++ include/linux/mfd/sun4i-gpadc-mfd.h | 94 +++++++++++++++++++ 4 files changed, 285 insertions(+) create mode 100644 drivers/mfd/sun4i-gpadc-mfd.c create mode 100644 include/linux/mfd/sun4i-gpadc-mfd.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 1bcf601..95b3c3e 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -29,6 +29,21 @@ config MFD_ACT8945A linear regulators, along with a complete ActivePath battery charger. +config MFD_SUN4I_GPADC + tristate "Allwinner sunxi platforms' GPADC MFD driver" + select MFD_CORE + select REGMAP_MMIO + depends on ARCH_SUNXI || COMPILE_TEST + help + Select this to get support for Allwinner SoCs (A10, A13 and A31) ADC. + This driver will only map the hardware interrupt and registers, you + have to select individual drivers based on this MFD to be able to use + the ADC or the thermal sensor. This will try to probe the ADC driver + sun4i-gpadc-iio and the hwmon driver iio_hwmon. + + To compile this driver as a module, choose M here: the module will be + called sun4i-gpadc-mfd. + config MFD_AS3711 bool "AMS AS3711" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 42a66e1..3b964d7 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -205,3 +205,5 @@ intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o intel-soc-pmic-$(CONFIG_INTEL_PMC_IPC) += intel_soc_pmic_bxtwc.o obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o obj-$(CONFIG_MFD_MT6397) += mt6397-core.o + +obj-$(CONFIG_MFD_SUN4I_GPADC) += sun4i-gpadc-mfd.o diff --git a/drivers/mfd/sun4i-gpadc-mfd.c b/drivers/mfd/sun4i-gpadc-mfd.c new file mode 100644 index 0000000..75aa7a8 --- /dev/null +++ b/drivers/mfd/sun4i-gpadc-mfd.c @@ -0,0 +1,174 @@ +/* ADC MFD core driver for sunxi platforms + * + * Copyright (c) 2016 Quentin Schulz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +static struct resource adc_resources[] = { + { + .name = "FIFO_DATA_PENDING", + .start = SUN4I_GPADC_IRQ_FIFO_DATA, + .end = SUN4I_GPADC_IRQ_FIFO_DATA, + .flags = IORESOURCE_IRQ, + }, { + .name = "TEMP_DATA_PENDING", + .start = SUN4I_GPADC_IRQ_TEMP_DATA, + .end = SUN4I_GPADC_IRQ_TEMP_DATA, + .flags = IORESOURCE_IRQ, + }, +}; + +static const struct regmap_irq sun4i_gpadc_mfd_regmap_irq[] = { + REGMAP_IRQ_REG(SUN4I_GPADC_IRQ_FIFO_DATA, 0, + SUN4I_GPADC_INT_FIFOC_TP_DATA_IRQ_EN), + REGMAP_IRQ_REG(SUN4I_GPADC_IRQ_TEMP_DATA, 0, + SUN4I_GPADC_INT_FIFOC_TEMP_IRQ_EN), +}; + +static const struct regmap_irq_chip sun4i_gpadc_mfd_regmap_irq_chip = { + .name = "sun4i_gpadc_mfd_irq_chip", + .status_base = SUN4I_GPADC_INT_FIFOS, + .ack_base = SUN4I_GPADC_INT_FIFOS, + .mask_base = SUN4I_GPADC_INT_FIFOC, + .init_ack_masked = true, + .mask_invert = true, + .irqs = sun4i_gpadc_mfd_regmap_irq, + .num_irqs = ARRAY_SIZE(sun4i_gpadc_mfd_regmap_irq), + .num_regs = 1, +}; + +static struct mfd_cell sun4i_gpadc_mfd_cells[] = { + { + .name = "sun4i-a10-gpadc-iio", + .resources = adc_resources, + .num_resources = ARRAY_SIZE(adc_resources), + }, { + .name = "iio_hwmon", + } +}; + +static struct mfd_cell sun5i_gpadc_mfd_cells[] = { + { + .name = "sun5i-a13-gpadc-iio", + .resources = adc_resources, + .num_resources = ARRAY_SIZE(adc_resources), + }, { + .name = "iio_hwmon", + }, +}; + +static struct mfd_cell sun6i_gpadc_mfd_cells[] = { + { + .name = "sun6i-a31-gpadc-iio", + .resources = adc_resources, + .num_resources = ARRAY_SIZE(adc_resources), + }, { + .name = "iio_hwmon", + }, +}; + +static const struct regmap_config sun4i_gpadc_mfd_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .fast_io = true, +}; + +static const struct of_device_id sun4i_gpadc_mfd_of_match[] = { + { + .compatible = "allwinner,sun4i-a10-ts", + .data = &sun4i_gpadc_mfd_cells, + }, { + .compatible = "allwinner,sun5i-a13-ts", + .data = &sun5i_gpadc_mfd_cells, + }, { + .compatible = "allwinner,sun6i-a31-ts", + .data = &sun6i_gpadc_mfd_cells, + }, { /* sentinel */ } +}; + +static int sun4i_gpadc_mfd_probe(struct platform_device *pdev) +{ + struct sun4i_gpadc_mfd_dev *mfd_dev; + struct resource *mem; + const struct of_device_id *of_id; + const struct mfd_cell *mfd_cells; + unsigned int irq; + int ret; + + of_id = of_match_node(sun4i_gpadc_mfd_of_match, pdev->dev.of_node); + if (!of_id) + return -EINVAL; + + mfd_dev = devm_kzalloc(&pdev->dev, sizeof(*mfd_dev), GFP_KERNEL); + if (!mfd_dev) + return -ENOMEM; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + mfd_dev->regs = devm_ioremap_resource(&pdev->dev, mem); + if (IS_ERR(mfd_dev->regs)) + return PTR_ERR(mfd_dev->regs); + + mfd_dev->dev = &pdev->dev; + dev_set_drvdata(mfd_dev->dev, mfd_dev); + + mfd_dev->regmap = devm_regmap_init_mmio(mfd_dev->dev, mfd_dev->regs, + &sun4i_gpadc_mfd_regmap_config); + if (IS_ERR(mfd_dev->regmap)) { + ret = PTR_ERR(mfd_dev->regmap); + dev_err(&pdev->dev, "failed to init regmap: %d\n", ret); + return ret; + } + + /* Disable all interrupts */ + regmap_write(mfd_dev->regmap, SUN4I_GPADC_INT_FIFOC, 0); + + irq = platform_get_irq(pdev, 0); + ret = devm_regmap_add_irq_chip(&pdev->dev, mfd_dev->regmap, irq, + IRQF_ONESHOT, 0, + &sun4i_gpadc_mfd_regmap_irq_chip, + &mfd_dev->regmap_irqc); + if (ret) { + dev_err(&pdev->dev, "failed to add irq chip: %d\n", ret); + return ret; + } + + mfd_cells = of_id->data; + ret = devm_mfd_add_devices(mfd_dev->dev, 0, mfd_cells, 2, NULL, 0, + NULL); + if (ret) { + dev_err(&pdev->dev, "failed to add MFD devices: %d\n", ret); + return ret; + } + + return 0; +} + +MODULE_DEVICE_TABLE(of, sun4i_gpadc_mfd_of_match); + +static struct platform_driver sun4i_gpadc_mfd_driver = { + .driver = { + .name = "sun4i-adc-mfd", + .of_match_table = of_match_ptr(sun4i_gpadc_mfd_of_match), + }, + .probe = sun4i_gpadc_mfd_probe, +}; + +module_platform_driver(sun4i_gpadc_mfd_driver); + +MODULE_DESCRIPTION("Allwinner sunxi platforms' GPADC MFD core driver"); +MODULE_AUTHOR("Quentin Schulz "); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/mfd/sun4i-gpadc-mfd.h b/include/linux/mfd/sun4i-gpadc-mfd.h new file mode 100644 index 0000000..546274b --- /dev/null +++ b/include/linux/mfd/sun4i-gpadc-mfd.h @@ -0,0 +1,94 @@ +/* Header of ADC MFD core driver for sunxi platforms + * + * Copyright (c) 2016 Quentin Schulz + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ + +#ifndef __SUN4I_GPADC_MFD__H__ +#define __SUN4I_GPADC_MFD__H__ + +#define SUN4I_GPADC_CTRL0 0x00 + +#define SUN4I_GPADC_CTRL0_ADC_FIRST_DLY(x) ((GENMASK(7, 0) & (x)) << 24) +#define SUN4I_GPADC_CTRL0_ADC_FIRST_DLY_MODE BIT(23) +#define SUN4I_GPADC_CTRL0_ADC_CLK_SELECT BIT(22) +#define SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(x) ((GENMASK(1, 0) & (x)) << 20) +#define SUN4I_GPADC_CTRL0_FS_DIV(x) ((GENMASK(3, 0) & (x)) << 16) +#define SUN4I_GPADC_CTRL0_T_ACQ(x) (GENMASK(15, 0) & (x)) + +#define SUN4I_GPADC_CTRL1 0x04 + +#define SUN4I_GPADC_CTRL1_STYLUS_UP_DEBOUNCE(x) ((GENMASK(7, 0) & (x)) << 12) +#define SUN4I_GPADC_CTRL1_STYLUS_UP_DEBOUNCE_EN BIT(9) +#define SUN4I_GPADC_CTRL1_TOUCH_PAN_CALI_EN BIT(6) +#define SUN4I_GPADC_CTRL1_TP_DUAL_EN BIT(5) +#define SUN4I_GPADC_CTRL1_TP_MODE_EN BIT(4) +#define SUN4I_GPADC_CTRL1_TP_ADC_SELECT BIT(3) +#define SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(2, 0) & (x)) + +/* TP_CTRL1 bits for sun6i SOCs */ +#define SUN6I_GPADC_CTRL1_TOUCH_PAN_CALI_EN BIT(7) +#define SUN6I_GPADC_CTRL1_TP_DUAL_EN BIT(6) +#define SUN6I_GPADC_CTRL1_TP_MODE_EN BIT(5) +#define SUN6I_GPADC_CTRL1_TP_ADC_SELECT BIT(4) +#define SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(x) (GENMASK(3, 0) & BIT(x)) + +#define SUN4I_GPADC_CTRL2 0x08 + +#define SUN4I_GPADC_CTRL2_TP_SENSITIVE_ADJUST(x) ((GENMASK(3, 0) & (x)) << 28) +#define SUN4I_GPADC_CTRL2_TP_MODE_SELECT(x) ((GENMASK(1, 0) & (x)) << 26) +#define SUN4I_GPADC_CTRL2_PRE_MEA_EN BIT(24) +#define SUN4I_GPADC_CTRL2_PRE_MEA_THRE_CNT(x) (GENMASK(23, 0) & (x)) + +#define SUN4I_GPADC_CTRL3 0x0c + +#define SUN4I_GPADC_CTRL3_FILTER_EN BIT(2) +#define SUN4I_GPADC_CTRL3_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) + +#define SUN4I_GPADC_TPR 0x18 + +#define SUN4I_GPADC_TPR_TEMP_ENABLE BIT(16) +#define SUN4I_GPADC_TPR_TEMP_PERIOD(x) (GENMASK(15, 0) & (x)) + +#define SUN4I_GPADC_INT_FIFOC 0x10 + +#define SUN4I_GPADC_INT_FIFOC_TEMP_IRQ_EN BIT(18) +#define SUN4I_GPADC_INT_FIFOC_TP_OVERRUN_IRQ_EN BIT(17) +#define SUN4I_GPADC_INT_FIFOC_TP_DATA_IRQ_EN BIT(16) +#define SUN4I_GPADC_INT_FIFOC_TP_DATA_XY_CHANGE BIT(13) +#define SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(x) ((GENMASK(4, 0) & (x)) << 8) +#define SUN4I_GPADC_INT_FIFOC_TP_DATA_DRQ_EN BIT(7) +#define SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH BIT(4) +#define SUN4I_GPADC_INT_FIFOC_TP_UP_IRQ_EN BIT(1) +#define SUN4I_GPADC_INT_FIFOC_TP_DOWN_IRQ_EN BIT(0) + +#define SUN4I_GPADC_INT_FIFOS 0x14 + +#define SUN4I_GPADC_INT_FIFOS_TEMP_DATA_PENDING BIT(18) +#define SUN4I_GPADC_INT_FIFOS_FIFO_OVERRUN_PENDING BIT(17) +#define SUN4I_GPADC_INT_FIFOS_FIFO_DATA_PENDING BIT(16) +#define SUN4I_GPADC_INT_FIFOS_TP_IDLE_FLG BIT(2) +#define SUN4I_GPADC_INT_FIFOS_TP_UP_PENDING BIT(1) +#define SUN4I_GPADC_INT_FIFOS_TP_DOWN_PENDING BIT(0) + +#define SUN4I_GPADC_CDAT 0x1c +#define SUN4I_GPADC_TEMP_DATA 0x20 +#define SUN4I_GPADC_DATA 0x24 + +#define SUN4I_GPADC_IRQ_FIFO_DATA 0 +#define SUN4I_GPADC_IRQ_TEMP_DATA 1 + +/* 10s delay before suspending the IP */ +#define SUN4I_GPADC_AUTOSUSPEND_DELAY 10000 + +struct sun4i_gpadc_mfd_dev { + struct device *dev; + struct regmap *regmap; + struct regmap_irq_chip_data *regmap_irqc; + void __iomem *regs; +}; + +#endif