From patchwork Wed Sep 14 20:09:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: fu.wei@linaro.org X-Patchwork-Id: 9332435 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 765516077A for ; Wed, 14 Sep 2016 20:13:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66EAD28FDA for ; Wed, 14 Sep 2016 20:13:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5B5C029FEA; Wed, 14 Sep 2016 20:13:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EF6BD28FDA for ; Wed, 14 Sep 2016 20:13:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bkGXY-0005aj-Vc; Wed, 14 Sep 2016 20:12:16 +0000 Received: from mail-wm0-x236.google.com ([2a00:1450:400c:c09::236]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bkGWw-0004vu-QR for linux-arm-kernel@lists.infradead.org; Wed, 14 Sep 2016 20:11:43 +0000 Received: by mail-wm0-x236.google.com with SMTP id i130so66712497wmf.0 for ; Wed, 14 Sep 2016 13:11:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4uOXDmzD4fAT52ZIyoNOMZp5ZocZi08Qh9RUK1Ko6PY=; b=CFNLBo9N/7SOEP3H6X92fJH/wD6Yw1po85YiD8WAC3bXnek4iJ9DyylDHVTrQTQ7J6 t7DhKYix8JOL0FpzaXNr/54KluJsS0P68Ghcj4xm9dMuPAXtoz+aY/scwHAUqW3QeFNH D9lVddSv6my9XE8FoUiGJw1H2DSKVZvWJDqxY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4uOXDmzD4fAT52ZIyoNOMZp5ZocZi08Qh9RUK1Ko6PY=; b=bWLitbww+tMoxU8mplDiePZ2PMxlQQQi2buMOcBU+RUa3iQVeyn3ps31qufJFAGocF bKKjiQyEmikLOcxq+atQMKuEgz0SPAbAYM4+EhHP3f0Hw0zulIyK3F4PSokrlpU4zLfO K+3Va4fVa42MoWB+dyVEYALciTbqUTXF341EN68yEOi9Tj9b2FAZjAkHXxHOkPIij9WZ D7BGt8tc0hpw2KgqGxSQPJiWRINU42losuR7FgrwNjNtnfu6IuMvdK9M/zItwxm/izyV R8IuwKCwAOonmNfE5obKg8gqhLS/ZqHGCV9hKhL9kEf5nk0wIOifIcmq35tz+EbHHA5A +PKw== X-Gm-Message-State: AE9vXwPqg8sm91lhpJp4j+de1ZpqLSx77w70ZPgj2Q7DB6wxnoOw0ttmnTqgpB5HWt37WW/Y X-Received: by 10.28.65.84 with SMTP id o81mr4712723wma.83.1473883876940; Wed, 14 Sep 2016 13:11:16 -0700 (PDT) Received: from Rei-Ayanami.localdomain.com ([59.58.254.106]) by smtp.googlemail.com with ESMTPSA id ab9sm1233449wjc.7.2016.09.14.13.11.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Sep 2016 13:11:16 -0700 (PDT) From: fu.wei@linaro.org To: rjw@rjwysocki.net, lenb@kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, marc.zyngier@arm.com, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, hanjun.guo@linaro.org Subject: [PATCH v13 1/8] clocksource/drivers/arm_arch_timer: Move enums and defines to header file Date: Thu, 15 Sep 2016 04:09:34 +0800 Message-Id: <1473883781-9571-2-git-send-email-fu.wei@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473883781-9571-1-git-send-email-fu.wei@linaro.org> References: <1473883781-9571-1-git-send-email-fu.wei@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160914_131139_301359_5F090918 X-CRM114-Status: GOOD ( 11.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linaro-acpi@lists.linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, wim@iguana.be, Fu Wei , wei@redhat.com, al.stone@linaro.org, tn@semihalf.com, timur@codeaurora.org, linux-acpi@vger.kernel.org, linux@roeck-us.net, harba@codeaurora.org, julien.grall@arm.com, linux-watchdog@vger.kernel.org, arnd@arndb.de, jcm@redhat.com, cov@codeaurora.org, linux-arm-kernel@lists.infradead.org, graeme.gregory@linaro.org, rruigrok@codeaurora.org, leo.duran@amd.com, Suravee.Suthikulpanit@amd.com, christoffer.dall@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fu Wei To support the arm_arch_timer via ACPI we need to share defines and enums between the driver and the ACPI parser code. Split out the relevant defines and enums into arm_arch_timer.h. No functional change. Signed-off-by: Fu Wei --- drivers/clocksource/arm_arch_timer.c | 11 ----------- include/clocksource/arm_arch_timer.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 5770054..aea6c10 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -51,8 +51,6 @@ #define CNTV_TVAL 0x38 #define CNTV_CTL 0x3c -#define ARCH_CP15_TIMER BIT(0) -#define ARCH_MEM_TIMER BIT(1) static unsigned arch_timers_present __initdata; static void __iomem *arch_counter_base; @@ -65,15 +63,6 @@ struct arch_timer { #define to_arch_timer(e) container_of(e, struct arch_timer, evt) static u32 arch_timer_rate; - -enum ppi_nr { - PHYS_SECURE_PPI, - PHYS_NONSECURE_PPI, - VIRT_PPI, - HYP_PPI, - MAX_TIMER_PPI -}; - static int arch_timer_ppi[MAX_TIMER_PPI]; static struct clock_event_device __percpu *arch_timer_evt; diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index caedb74..6f06481 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -19,6 +19,9 @@ #include #include +#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1) + #define ARCH_TIMER_CTRL_ENABLE (1 << 0) #define ARCH_TIMER_CTRL_IT_MASK (1 << 1) #define ARCH_TIMER_CTRL_IT_STAT (1 << 2) @@ -34,6 +37,14 @@ enum arch_timer_reg { ARCH_TIMER_REG_TVAL, }; +enum ppi_nr { + PHYS_SECURE_PPI, + PHYS_NONSECURE_PPI, + VIRT_PPI, + HYP_PPI, + MAX_TIMER_PPI +}; + #define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_MEM_PHYS_ACCESS 2