From patchwork Wed Sep 28 18:17:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: fu.wei@linaro.org X-Patchwork-Id: 9354471 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 339E060757 for ; Wed, 28 Sep 2016 18:20:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 25BDD29688 for ; Wed, 28 Sep 2016 18:20:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 19D66297A3; Wed, 28 Sep 2016 18:20:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7F0992979A for ; Wed, 28 Sep 2016 18:20:49 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bpJSA-0005eg-Se; Wed, 28 Sep 2016 18:19:34 +0000 Received: from mail-pf0-x232.google.com ([2607:f8b0:400e:c00::232]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bpJRP-0005TY-Tl for linux-arm-kernel@lists.infradead.org; Wed, 28 Sep 2016 18:18:49 +0000 Received: by mail-pf0-x232.google.com with SMTP id q2so19863623pfj.3 for ; Wed, 28 Sep 2016 11:18:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4uOXDmzD4fAT52ZIyoNOMZp5ZocZi08Qh9RUK1Ko6PY=; b=NDlW7kYOqbuvz8kWt8z2dkS8RsRcrWYPq7jJymbg0q9y5pXT+bW7tRML93t48ZjaWI LTcdEM+dJAHztPFpiY6t2mSBHmc/8BfOD4rHvAUGVriNFfo5c5nbPKVPkVNibbQPlrYI F2pyCH0l3vjej4128Fao8nmVxjTg+AAYKjjbk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4uOXDmzD4fAT52ZIyoNOMZp5ZocZi08Qh9RUK1Ko6PY=; b=KF3EWkkJoyNkMZuyQXuBkITdtXOaOdUwmMGKrSiKnn3jjPz+umNx1lM2CYfMUNBuKD HrB1M0C2lfkd2vbx+Z0AYhEcUk3A755rV/HUEguT3fTB9PI+FAC7aHr+ZrZgBuoE4b7g UT4otQqnMgmma7SsDnLw+cArAjzqphXObKEkY8AUvPDh3NNUlTMvuse+mY8LeGv/XzSg /lRLw8Tz1hcJrW/oMcSBdpzYaA2JtlkrYMfuGeUKgkbn/mJycp56AUMwxY4D2ogUEYmo gLvtIoMtorYOXL9WIwAnY4UKBtcRdd3sjNAvRQgO5jOFXIreMbBVJ0U2lioEXmWUT1p8 24+A== X-Gm-Message-State: AE9vXwOfDOkaWhyDrcq0KBGqpI2TIgP0xPl2vEx2kWU5HbNOrhwstFumWJ4B8t1km722FW25 X-Received: by 10.98.216.6 with SMTP id e6mr60019854pfg.106.1475086709083; Wed, 28 Sep 2016 11:18:29 -0700 (PDT) Received: from Rei-Ayanami.localdomain.localdomain ([67.238.99.186]) by smtp.googlemail.com with ESMTPSA id ak3sm14226365pad.19.2016.09.28.11.18.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Sep 2016 11:18:28 -0700 (PDT) From: fu.wei@linaro.org To: rjw@rjwysocki.net, lenb@kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, marc.zyngier@arm.com, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, hanjun.guo@linaro.org Subject: [PATCH v14 1/9] clocksource/drivers/arm_arch_timer: Move enums and defines to header file Date: Thu, 29 Sep 2016 02:17:09 +0800 Message-Id: <1475086637-1914-2-git-send-email-fu.wei@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1475086637-1914-1-git-send-email-fu.wei@linaro.org> References: <1475086637-1914-1-git-send-email-fu.wei@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160928_111848_046198_E9D1D6AD X-CRM114-Status: GOOD ( 12.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linaro-acpi@lists.linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, wim@iguana.be, Fu Wei , wei@redhat.com, al.stone@linaro.org, tn@semihalf.com, timur@codeaurora.org, linux-acpi@vger.kernel.org, linux@roeck-us.net, harba@codeaurora.org, julien.grall@arm.com, linux-watchdog@vger.kernel.org, arnd@arndb.de, jcm@redhat.com, cov@codeaurora.org, linux-arm-kernel@lists.infradead.org, graeme.gregory@linaro.org, rruigrok@codeaurora.org, leo.duran@amd.com, Suravee.Suthikulpanit@amd.com, christoffer.dall@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Fu Wei To support the arm_arch_timer via ACPI we need to share defines and enums between the driver and the ACPI parser code. Split out the relevant defines and enums into arm_arch_timer.h. No functional change. Signed-off-by: Fu Wei Acked-by: Mark Rutland --- drivers/clocksource/arm_arch_timer.c | 11 ----------- include/clocksource/arm_arch_timer.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 5770054..aea6c10 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -51,8 +51,6 @@ #define CNTV_TVAL 0x38 #define CNTV_CTL 0x3c -#define ARCH_CP15_TIMER BIT(0) -#define ARCH_MEM_TIMER BIT(1) static unsigned arch_timers_present __initdata; static void __iomem *arch_counter_base; @@ -65,15 +63,6 @@ struct arch_timer { #define to_arch_timer(e) container_of(e, struct arch_timer, evt) static u32 arch_timer_rate; - -enum ppi_nr { - PHYS_SECURE_PPI, - PHYS_NONSECURE_PPI, - VIRT_PPI, - HYP_PPI, - MAX_TIMER_PPI -}; - static int arch_timer_ppi[MAX_TIMER_PPI]; static struct clock_event_device __percpu *arch_timer_evt; diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index caedb74..6f06481 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -19,6 +19,9 @@ #include #include +#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1) + #define ARCH_TIMER_CTRL_ENABLE (1 << 0) #define ARCH_TIMER_CTRL_IT_MASK (1 << 1) #define ARCH_TIMER_CTRL_IT_STAT (1 << 2) @@ -34,6 +37,14 @@ enum arch_timer_reg { ARCH_TIMER_REG_TVAL, }; +enum ppi_nr { + PHYS_SECURE_PPI, + PHYS_NONSECURE_PPI, + VIRT_PPI, + HYP_PPI, + MAX_TIMER_PPI +}; + #define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_MEM_PHYS_ACCESS 2