From patchwork Wed Oct 19 15:21:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 9384465 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6A7D2607D0 for ; Wed, 19 Oct 2016 15:24:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5925B29481 for ; Wed, 19 Oct 2016 15:24:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4D8D029576; Wed, 19 Oct 2016 15:24:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2E47F29481 for ; Wed, 19 Oct 2016 15:24:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bwsh9-00006t-DR; Wed, 19 Oct 2016 15:22:19 +0000 Received: from mail-qt0-x230.google.com ([2607:f8b0:400d:c0d::230]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bwsgy-0008Ob-EC for linux-arm-kernel@lists.infradead.org; Wed, 19 Oct 2016 15:22:09 +0000 Received: by mail-qt0-x230.google.com with SMTP id q7so24197541qtq.1 for ; Wed, 19 Oct 2016 08:21:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=CBIKugDPvE6YZkZlIZ4fS4SNIQVRR1eJoF92Ln/1e7A=; b=RadWvDELRAo1JSoLq6i1JQmOnXqs5cO/0ly/vU5Y3AcmK15eQIQnmi7em9Osu84yPL dDYmyx4LOX5eAJh1X2Ak7nS49F8NbJF9lTkkUHxweZo4yqAuJLeyjS1e1VWgiXEtNwVh jGEmB0NdLOq0P1dPbZReFRnTHnfKGWMg+DrJUFSoVktXQysZQnhksJJ/pbSbK+lyde1F zQacw0JcyXF9B1qGZO/ug53Wz4qh9HtZrLYxUnaHgqV6Y8PbsPWCmNX6ay5rJYrcElV7 X0m9UZJdV0PVP43LrqlpJtsS4nccdZduJwcEkFnoWQvREdYp7a/sS1siAfdwQYwmzvoI 1fbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CBIKugDPvE6YZkZlIZ4fS4SNIQVRR1eJoF92Ln/1e7A=; b=hVkhs9l4IazZqYrdOTPetI3KKITQjGT395X1t0MvpnoWqejeysFQqbf7nZ1UhSfsuf dKb2+T9dsyZJx2Xlx39lGBNapHfQsROxkBQMyAfwcf29D2976vv04Nm+YMRRSR7bgw5j gJ4SRkez9+AR+8haXWaCBuP0WLSEDi0gDRhJVoX94OWWae6ausuozxqVVDZKwUux70If DG7P8alHqU9UzWt8ID8DM5n40vDXYEmX4GFK9AEnSa4wc02Vpqg3LNHx5cDqA0eDxJvK mTyLaPpHI0l6tQUrLTN4BoEOR3+inxOl/j00+6VB5O/DJDb1FB+lm0YMhgs2+2hWEW4A P4tQ== X-Gm-Message-State: AA6/9Rl8Es395/lcZxq/qgi9UmT57PA2d2eanGbsQwB5BGG/6I/yfrPHBgFhkSfhdt+ycOHp X-Received: by 10.28.193.65 with SMTP id r62mr2973395wmf.12.1476890501942; Wed, 19 Oct 2016 08:21:41 -0700 (PDT) Received: from boomer.baylibre.com ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id f2sm69725653wjr.2.2016.10.19.08.21.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 19 Oct 2016 08:21:41 -0700 (PDT) From: Jerome Brunet To: Carlo Caione , Kevin Hilman , Linus Walleij Subject: [PATCH v2 4/9] pinctrl: meson: allow gpio to request irq Date: Wed, 19 Oct 2016 17:21:15 +0200 Message-Id: <1476890480-8884-5-git-send-email-jbrunet@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1476890480-8884-1-git-send-email-jbrunet@baylibre.com> References: <1476890480-8884-1-git-send-email-jbrunet@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161019_082208_622346_2BCF6A8F X-CRM114-Status: GOOD ( 19.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jason Cooper , Marc Zyngier , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Russell King , linux-gpio@vger.kernel.org, Rob Herring , linux-amlogic@lists.infradead.org, Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Jerome Brunet MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add the ability for gpio to request irq from the gpio interrupt controller if present. We have to specificaly that the parent interrupt controller is the gpio interrupt controller because gpio on meson SoCs can't generate interrupt directly on the GIC. Signed-off-by: Jerome Brunet --- drivers/pinctrl/Kconfig | 2 + drivers/pinctrl/meson/pinctrl-meson.c | 77 ++++++++++++++++++++++++++++++++++- drivers/pinctrl/meson/pinctrl-meson.h | 1 + 3 files changed, 79 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 0e75d94972ba..d5bfbfcddab0 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -126,7 +126,9 @@ config PINCTRL_MESON select PINCONF select GENERIC_PINCONF select GPIOLIB + select IRQ_DOMAIN select OF_GPIO + select OF_IRQ select REGMAP_MMIO config PINCTRL_OXNAS diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 57122eda155a..fd3c1d44978b 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -50,6 +50,7 @@ #include #include #include +#include #include #include #include @@ -481,6 +482,58 @@ static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value) value ? BIT(bit) : 0); } +static int meson_gpio_to_hwirq(struct meson_bank *bank, unsigned int offset) +{ + unsigned int hwirq; + + if (bank->irq_first < 0) + /* this bank cannot generate irqs */ + return -1; + + hwirq = offset - bank->first + bank->irq_first; + + if (hwirq > bank->irq_last) + /* this pin cannot generate irqs */ + return -1; + + return hwirq; +} + +static int meson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) +{ + struct meson_pinctrl *pc = gpiochip_get_data(chip); + struct meson_bank *bank; + struct irq_fwspec fwspec; + unsigned int hwirq; + int ret; + + ret = meson_get_bank(pc, offset, &bank); + if (ret) + return ret; + + /* + * The interrupt controller might be missing, in such case we can't + * provide an interrupt for a pin + */ + if (is_fwnode_irqchip(pc->fwnode)) { + dev_info(pc->dev, "interrupt controller not found\n"); + return 0; + } + + hwirq = meson_gpio_to_hwirq(bank, offset); + if (hwirq < 0) { + dev_dbg(pc->dev, "no interrupt for pin %u\n", offset); + return 0; + } + + fwspec.fwnode = pc->fwnode; + fwspec.param_count = 2; + fwspec.param[0] = hwirq; + fwspec.param[1] = IRQ_TYPE_NONE; + + return irq_create_fwspec_mapping(&fwspec); +} + static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio) { struct meson_pinctrl *pc = gpiochip_get_data(chip); @@ -539,6 +592,7 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc) pc->chip.direction_output = meson_gpio_direction_output; pc->chip.get = meson_gpio_get; pc->chip.set = meson_gpio_set; + pc->chip.to_irq = meson_gpio_to_irq; pc->chip.base = pc->data->pin_base; pc->chip.ngpio = pc->data->num_pins; pc->chip.can_sleep = false; @@ -598,6 +652,27 @@ static struct regmap *meson_map_resource(struct meson_pinctrl *pc, return devm_regmap_init_mmio(pc->dev, base, &meson_regmap_config); } +static int meson_pinctrl_get_irq_gpio_intc(struct meson_pinctrl *pc, + struct device_node *node) +{ + struct device_node *np; + + np = of_irq_find_parent(node); + if (unlikely(!np)) { + dev_err(pc->dev, "interrupt parent not found\n"); + return -EINVAL; + } + + if (!of_device_is_compatible(np, pc->data->irq_compat)) { + dev_info(pc->dev, "gpio interrupt disabled\n"); + pc->fwnode = NULL; + } + + pc->fwnode = of_node_to_fwnode(np); + + return 0; +} + static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, struct device_node *node) { @@ -643,7 +718,7 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, return PTR_ERR(pc->reg_gpio); } - return 0; + return meson_pinctrl_get_irq_gpio_intc(pc, gpio_np); } static int meson_pinctrl_probe(struct platform_device *pdev) diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index b90d69e366df..2e6c83adbd1f 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -123,6 +123,7 @@ struct meson_pinctrl { struct regmap *reg_gpio; struct gpio_chip chip; struct device_node *of_node; + struct fwnode_handle *fwnode; }; #define PIN(x, b) (b + x)