@@ -313,7 +313,7 @@
};
};
- ethernet0_mii: mii@0 {
+ ethernet_mii: mii@0 {
pins {
pinmux = <STM32F429_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0>,
<STM32F429_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1>,
@@ -373,13 +373,13 @@
st,mem2mem;
};
- ethernet0: dwmac@40028000 {
+ mac: ethernet@40028000 {
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
interrupts = <61>, <62>;
interrupt-names = "macirq", "eth_wake_irq";
- clock-names = "stmmaceth", "tx-clk", "rx-clk";
+ clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
st,syscon = <&syscfg 0x4>;
snps,pbl = <8>;
This patch aligns clocks names and node reference according to new stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle (indeed there is no need to add 0 as Ethernet instance as there is only one IP in SOC). Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>