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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN2PR03MB2383 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161025_133413_866555_88C99BAD X-CRM114-Status: GOOD ( 13.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Stuart Yoder , Yang-Leo Li , Minghuan Lian , Scott Wood , Shawn Guo , Mingkai Hu Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP LS1046a has three MSI controllers. each controller is assigned four SPI interrupts. Signed-off-by: Minghuan Lian --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 32 ++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 38806ca..5509dca 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -511,5 +511,37 @@ interrupts = ; clocks = <&clockgen 4 1>; }; + + msi: msi-controller { + compatible = "fsl,ls-scfg-msi"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + msi-controller; + + msi0@1580000 { + reg = <0x0 0x1580000 0x0 0x10000>; + interrupts = <0 116 0x4>, + <0 111 0x4>, + <0 112 0x4>, + <0 113 0x4>; + }; + + msi1@1590000 { + reg = <0x0 0x1590000 0x0 0x10000>; + interrupts = <0 126 0x4>, + <0 121 0x4>, + <0 122 0x4>, + <0 123 0x4>; + }; + + msi2@15a0000 { + reg = <0x0 0x15a0000 0x0 0x10000>; + interrupts = <0 160 0x4>, + <0 155 0x4>, + <0 156 0x4>, + <0 157 0x4>; + }; + }; }; };