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Ip=[66.35.236.227]; Helo=[sj-itexedge03.altera.priv.altera.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR03MB283 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161101_165534_656160_F7E14790 X-CRM114-Status: UNSURE ( 4.06 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alan Tull , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, delicious.quinoa@gmail.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch enables the following in the socfpga_defconfig: +CONFIG_OF_OVERLAY=y Enable support for Device Tree Overlays +CONFIG_FPGA_REGION=y Enable device tree overlay support for FPGA programming +CONFIG_FPGA_MGR_SOCFPGA_A10=y Enable partial reconfiguration for Altera Arria 10 FPGA +CONFIG_FPGA_BRIDGE=y Enable the FPGA Bridges framework +CONFIG_SOCFPGA_FPGA_BRIDGE=y Enable support for SoCFPGA hardware bridges +CONFIG_ALTERA_FREEZE_BRIDGE=y Enable support for the Altera Soft IP Freeze bridges Signed-off-by: Alan Tull --- arch/arm/configs/socfpga_defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig index f5b9bc5..18d3ec1 100644 --- a/arch/arm/configs/socfpga_defconfig +++ b/arch/arm/configs/socfpga_defconfig @@ -54,6 +54,7 @@ CONFIG_DEVTMPFS_MOUNT=y CONFIG_MTD=y CONFIG_MTD_SPI_NOR=y CONFIG_SPI_CADENCE_QUADSPI=y +CONFIG_OF_OVERLAY=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=2 CONFIG_BLK_DEV_RAM_SIZE=8192 @@ -105,7 +106,12 @@ CONFIG_DMADEVICES=y CONFIG_PL330_DMA=y CONFIG_DMATEST=m CONFIG_FPGA=y +CONFIG_FPGA_REGION=y CONFIG_FPGA_MGR_SOCFPGA=y +CONFIG_FPGA_MGR_SOCFPGA_A10=y +CONFIG_FPGA_BRIDGE=y +CONFIG_SOCFPGA_FPGA_BRIDGE=y +CONFIG_ALTERA_FREEZE_BRIDGE=y CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y