From patchwork Mon Nov 14 05:02:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pankaj Dubey X-Patchwork-Id: 9426493 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6B5D660233 for ; Mon, 14 Nov 2016 05:08:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5A325288EA for ; Mon, 14 Nov 2016 05:08:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4C28D288F4; Mon, 14 Nov 2016 05:08:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B18E6288EA for ; Mon, 14 Nov 2016 05:08:42 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c69U4-0005SV-S9; Mon, 14 Nov 2016 05:07:08 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c69N4-0005zp-6T for linux-arm-kernel@lists.infradead.org; Mon, 14 Nov 2016 04:59:56 +0000 Received: from epcpsbgm2new.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OGM01IO98J4WVA0@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Mon, 14 Nov 2016 13:59:31 +0900 (KST) X-AuditID: cbfee61b-f796f6d000004092-e1-582944b32904 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id D4.66.16530.3B449285; Mon, 14 Nov 2016 13:59:31 +0900 (KST) Received: from pankaj.sisodomain.com ([107.108.83.125]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OGM009SR8IFBJ70@mmp2.samsung.com>; Mon, 14 Nov 2016 13:59:31 +0900 (KST) From: Pankaj Dubey To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/16] ARM: BCM: use generic API for enabling SCU Date: Mon, 14 Nov 2016 10:32:04 +0530 Message-id: <1479099731-28108-10-git-send-email-pankaj.dubey@samsung.com> X-Mailer: git-send-email 2.7.4 In-reply-to: <1479099731-28108-1-git-send-email-pankaj.dubey@samsung.com> References: <1479099731-28108-1-git-send-email-pankaj.dubey@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrPIsWRmVeSWpSXmKPExsVy+t9jQd3NLpoRBhuXq1v8nXSM3WJt71EW i1/vjrBbzJ09idGieetXRovz5zewW2x6fI3V4vKuOWwWD1a/ZbNYtPULu8XTmZvZLC71T2Sy eLf6CaPF/G8nWS06ljFabH5wjM1BwOPytYvMHr9/TWL0mHX/LJvHxLO6Hjtn3WX32LSqk81j 85J6j74tqxg95vz8xuLxeZNcAFeUm01GamJKapFCal5yfkpmXrqtUmiIm66FkkJeYm6qrVKE rm9IkJJCWWJOKZBnZIAGHJwD3IOV9O0S3DKOXJzDWnBftqJrwwTmBsZJEl2MnBwSAiYSM15M Z4KwxSQu3FvP1sXIxSEkMItRYvaql2wgCSGBn4wSc/+XgthsAroST97PZQaxRQTcJG40doA1 MwtMZpY4/1cGxBYWcJR4dHcTWA2LgKpEy89+dhCbV8BTouXZITaIZXISN891gtVwAsXndJ6B 2uUh8fzGdcYJjLwLGBlWMUqkFiQXFCel5xrlpZbrFSfmFpfmpesl5+duYgRH1jPpHYyHd7kf YhTgYFTi4e3I14gQYk0sK67MPcQowcGsJMLraqMZIcSbklhZlVqUH19UmpNafIjRFOiwicxS osn5wKjPK4k3NDE3MTc2sDC3tDQxUhLnbZz9LFxIID2xJDU7NbUgtQimj4mDU6qBUeVWBYP3 r2RTzodtDZ+vaR/7qyKmPm/Vc5WQy0/5hPcWtD+Lm3yabdr+Pf0F3OGc2/Nnnphj48yTou7l cO4I35HZv+YsK/97bLPpjO1XLNbI/ykSTsycyTxheXZ1BqtkpYrkxJfNa/a1uGma2VSYrNrJ 0surZO7IrCqbuzvxaXnl+7hUc31lJZbijERDLeai4kQAhweSOcICAAA= X-MTR: 20000000000000000@CPGS X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161113_205954_566607_4BC6E4DD X-CRM114-Status: GOOD ( 16.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Florian Fainelli , arnd@arndb.de, geert+renesas@glider.be, Scott Branden , vireshk@kernel.org, magnus.damm@gmail.com, Ray Jui , krzk@kernel.org, rmk+kernel@armlinux.org.uk, horms@verge.net.au, bcm-kernel-feedback-list@broadcom.com, thomas.ab@samsung.com, Pankaj Dubey , shiraz.linux.kernel@gmail.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Now as we have of_scu_enable which takes care of mapping scu base from DT, lets use it. CC: Florian Fainelli CC: Ray Jui CC: Scott Branden CC: bcm-kernel-feedback-list@broadcom.com Signed-off-by: Pankaj Dubey Reviewed-by: Florian Fainelli --- arch/arm/mach-bcm/bcm63xx_smp.c | 18 ++-------------- arch/arm/mach-bcm/platsmp.c | 46 +---------------------------------------- 2 files changed, 3 insertions(+), 61 deletions(-) diff --git a/arch/arm/mach-bcm/bcm63xx_smp.c b/arch/arm/mach-bcm/bcm63xx_smp.c index 9b6727e..a4c6ecd 100644 --- a/arch/arm/mach-bcm/bcm63xx_smp.c +++ b/arch/arm/mach-bcm/bcm63xx_smp.c @@ -20,9 +20,6 @@ #include "bcm63xx_smp.h" -/* Size of mapped Cortex A9 SCU address space */ -#define CORTEX_A9_SCU_SIZE 0x58 - /* * Enable the Cortex A9 Snoop Control Unit * @@ -35,7 +32,6 @@ */ static int __init scu_a9_enable(void) { - unsigned long config_base; void __iomem *scu_base; unsigned int i, ncores; @@ -44,19 +40,9 @@ static int __init scu_a9_enable(void) return -ENXIO; } - /* Config base address register value is zero for uniprocessor */ - config_base = scu_a9_get_base(); - if (!config_base) { - pr_err("hardware reports only one core\n"); - return -ENOENT; - } - - scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); - if (!scu_base) { - pr_err("failed to remap config base (%lu/%u) for SCU\n", - config_base, CORTEX_A9_SCU_SIZE); + scu_base = of_scu_get_base(); + if (IS_ERR(scu_base)) return -ENOMEM; - } scu_enable(scu_base); diff --git a/arch/arm/mach-bcm/platsmp.c b/arch/arm/mach-bcm/platsmp.c index 3ac3a9b..743599a 100644 --- a/arch/arm/mach-bcm/platsmp.c +++ b/arch/arm/mach-bcm/platsmp.c @@ -28,9 +28,6 @@ #include #include -/* Size of mapped Cortex A9 SCU address space */ -#define CORTEX_A9_SCU_SIZE 0x58 - #define SECONDARY_TIMEOUT_NS NSEC_PER_MSEC /* 1 msec (in nanoseconds) */ #define BOOT_ADDR_CPUID_MASK 0x3 @@ -38,47 +35,6 @@ #define OF_SECONDARY_BOOT "secondary-boot-reg" #define MPIDR_CPUID_BITMASK 0x3 -/* - * Enable the Cortex A9 Snoop Control Unit - * - * By the time this is called we already know there are multiple - * cores present. We assume we're running on a Cortex A9 processor, - * so any trouble getting the base address register or getting the - * SCU base is a problem. - * - * Return 0 if successful or an error code otherwise. - */ -static int __init scu_a9_enable(void) -{ - unsigned long config_base; - void __iomem *scu_base; - - if (!scu_a9_has_base()) { - pr_err("no configuration base address register!\n"); - return -ENXIO; - } - - /* Config base address register value is zero for uniprocessor */ - config_base = scu_a9_get_base(); - if (!config_base) { - pr_err("hardware reports only one core\n"); - return -ENOENT; - } - - scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); - if (!scu_base) { - pr_err("failed to remap config base (%lu/%u) for SCU\n", - config_base, CORTEX_A9_SCU_SIZE); - return -ENOMEM; - } - - scu_enable(scu_base); - - iounmap(scu_base); /* That's the last we'll need of this */ - - return 0; -} - static u32 secondary_boot_addr_for(unsigned int cpu) { u32 secondary_boot_addr = 0; @@ -134,7 +90,7 @@ static void __init bcm_smp_prepare_cpus(unsigned int max_cpus) const cpumask_t only_cpu_0 = { CPU_BITS_CPU0 }; /* Enable the SCU on Cortex A9 based SoCs */ - if (scu_a9_enable()) { + if (of_scu_enable()) { /* Update the CPU present map to reflect uniprocessor mode */ pr_warn("failed to enable A9 SCU - disabling SMP\n"); init_cpu_present(&only_cpu_0);