From patchwork Tue Nov 29 02:13:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jintack Lim X-Patchwork-Id: 9450851 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 036DF6071C for ; Tue, 29 Nov 2016 02:25:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DB812280F4 for ; Tue, 29 Nov 2016 02:25:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CBFF928113; Tue, 29 Nov 2016 02:25:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2B2F5280F4 for ; Tue, 29 Nov 2016 02:25:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cBY4f-0008Fu-1P; Tue, 29 Nov 2016 02:23:13 +0000 Received: from outprodmail02.cc.columbia.edu ([128.59.72.51]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1cBY4b-00085T-5A for linux-arm-kernel@lists.infradead.org; Tue, 29 Nov 2016 02:23:10 +0000 Received: from hazelnut (hazelnut.cc.columbia.edu [128.59.213.250]) by outprodmail02.cc.columbia.edu (8.14.4/8.14.4) with ESMTP id uAT2I5Ms036638 for ; Mon, 28 Nov 2016 21:22:48 -0500 Received: from hazelnut (localhost.localdomain [127.0.0.1]) by hazelnut (Postfix) with ESMTP id 08AA67E for ; Mon, 28 Nov 2016 21:22:48 -0500 (EST) Received: from sendprodmail03.cc.columbia.edu (sendprodmail03.cc.columbia.edu [128.59.72.15]) by hazelnut (Postfix) with ESMTP id C4F2E7E for ; Mon, 28 Nov 2016 21:22:47 -0500 (EST) Received: from mail-qt0-f200.google.com (mail-qt0-f200.google.com [209.85.216.200]) by sendprodmail03.cc.columbia.edu (8.14.4/8.14.4) with ESMTP id uAT2MlmB051140 (version=TLSv1/SSLv3 cipher=AES128-GCM-SHA256 bits=128 verify=NOT) for ; Mon, 28 Nov 2016 21:22:47 -0500 Received: by mail-qt0-f200.google.com with SMTP id d45so103832504qta.2 for ; Mon, 28 Nov 2016 18:22:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ZpY8qPAtv1RUUvhBiVLh6BeRzafT2txX0r9AR1Cce5Q=; b=bwMGGFgzwcmSLFzlM5sxMvC+7mRIC+osqthbsKDE/U0vekE0lEQGFLkg5RH8lHmcAk ET6ymTZgCdW7ANzCKBjtvizG0lF1+gdBSs9Q80X0n1CXf6RQR4g1AsdRdecK6os7LPin U8TeARKbM53YVBVEbefPBzXN6GRKttggweE8FCYqXiHWrf5OFD/Jw4ncAf8klOZ2KlPT C5rJsl7B7hLbN6j+pHHyFVeU4D1Tt+OFC2bK+IplRtQx5WGsq3GX9G2ZCdT7cYnDV41q vJHFbFa/gxWY0wkkv+BpjsQ1EZo65WY/ezFUFYXKRqcDdIUBHi5/EX4Lx7FaZxwlr+nQ vrGw== X-Gm-Message-State: AKaTC01xn7f+zxlizswp9199asfEFi7NvX4TtEJD6mqeFU6QfyotiLtK5gJTMAQPBcWPbmqnZtBuWmKcdlRQH/r9HANqdfnH2cljTm1O2dyM+gr2r2kuQBw2MhE7eAXh1mhlepVZ+tQ15ZIUicVCoGRYtgcUKmAHnLGZYg== X-Received: by 10.55.21.81 with SMTP id f78mr24005294qkh.210.1480386167447; Mon, 28 Nov 2016 18:22:47 -0800 (PST) X-Received: by 10.55.21.81 with SMTP id f78mr24005283qkh.210.1480386167260; Mon, 28 Nov 2016 18:22:47 -0800 (PST) Received: from jintack.cs.columbia.edu ([2001:18d8:ffff:16:21a:4aff:feaa:f900]) by smtp.gmail.com with ESMTPSA id c76sm29881682qke.0.2016.11.28.18.22.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 28 Nov 2016 18:22:46 -0800 (PST) From: Jintack Lim To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2] arm64: head.S: Fix CNTHCTL_EL2 access on VHE system Date: Mon, 28 Nov 2016 21:13:02 -0500 Message-Id: <1480385582-24176-1-git-send-email-jintack@cs.columbia.edu> X-Mailer: git-send-email 1.9.1 X-No-Spam-Score: Local X-Scanned-By: MIMEDefang 2.78 on 128.59.72.15 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161128_182309_459076_A0ED273C X-CRM114-Status: GOOD ( 13.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marc.zyngier@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Jintack , kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jintack Bit positions of CNTHCTL_EL2 are changing depending on HCR_EL2.E2H bit. EL1PCEN and EL1PCTEN are 1st and 0th bits when E2H is not set, but they are 11th and 10th bits respectively when E2H is set. Current code is unintentionally setting wrong bits to CNTHCTL_EL2 with E2H set. In fact, we don't need to set those two bits, which allow EL1 and EL0 to access physical timer and counter respectively, if E2H and TGE are set for the host kernel. They will be configured later as necessary. First, we don't need to configure those bits for EL1, since the host kernel runs in EL2. It is a hypervisor's responsibility to configure them before entering a VM, which runs in EL0 and EL1. Second, EL0 accesses are configured in the later stage of boot process. Signed-off-by: Jintack Lim Acked-by: Marc Zyngier --- v2: Add comments about accessing CNTHCTL_EL2 when HCR_EL2.ECH == 1 --- arch/arm64/kernel/head.S | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 332e331..136cb0d 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -524,10 +524,21 @@ set_hcr: msr hcr_el2, x0 isb - /* Generic timers. */ + /* + * Allow Non-secure EL1 and EL0 to access physical timer and counter. + * This is not necessary for VHE, since the host kernel runs in EL2, + * and EL0 accesses are configured in the later stage of boot process. + * Note that when HCR_EL2.E2H == 1, CNTHCTL_EL2 has the same bit layout + * as CNTKCTL_EL1, and CNTKCTL_EL1 accessing instructions are redefined + * to access CNTHCTL_EL2. This allows the kernel designed to run at EL1 + * to transparently mess with the EL0 bits via CNTKCTL_EL1 access in + * EL2. + */ + cbnz x2, 1f mrs x0, cnthctl_el2 orr x0, x0, #3 // Enable EL1 physical timers msr cnthctl_el2, x0 +1: msr cntvoff_el2, xzr // Clear virtual offset #ifdef CONFIG_ARM_GIC_V3