From patchwork Fri Dec 2 07:18:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 9457969 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C746D60236 for ; Fri, 2 Dec 2016 07:20:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BE7E32852B for ; Fri, 2 Dec 2016 07:20:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B2D9E2852E; Fri, 2 Dec 2016 07:20:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 214622852B for ; Fri, 2 Dec 2016 07:20:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCi7x-0003ij-LY; Fri, 02 Dec 2016 07:19:25 +0000 Received: from mailout2.samsung.com ([203.254.224.25]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCi7B-0003EL-T3 for linux-arm-kernel@lists.infradead.org; Fri, 02 Dec 2016 07:18:40 +0000 Received: from epcpsbgm1new.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OHJ02JYNQY8YQ00@mailout2.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 02 Dec 2016 16:18:08 +0900 (KST) X-AuditID: cbfee61a-f79916d0000062de-1a-58412030a6ca Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 0F.6C.25310.03021485; Fri, 2 Dec 2016 16:18:08 +0900 (KST) Received: from localhost.localdomain ([10.113.62.212]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OHJ00CWKQY7FI90@mmp2.samsung.com>; Fri, 02 Dec 2016 16:18:08 +0900 (KST) From: Chanwoo Choi To: krzk@kernel.org, javier@osg.samsung.com, kgene@kernel.org, robh+dt@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Subject: [PATCH 4/5] arm64: dts: exynos5433: Add bus dt node using VDD_INT for Exynos5433 Date: Fri, 02 Dec 2016 16:18:06 +0900 Message-id: <1480663087-4590-5-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1480663087-4590-1-git-send-email-cw00.choi@samsung.com> References: <1480663087-4590-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupnkeLIzCtJLcpLzFFi42I5/e+xoK6BgmOEwc9LFhbXvzxntZh/5Byr xZu3a5gs+h+/ZrY4f34Du8XZpjfsFpseX2O1uLxrDpvFjPP7mCxuN65gs2jde4Td4vCbdlaL Vbv+MDrweuycdZfdY9OqTjaPzUvqPbb0A3l9W1YxenzeJBfAFuVmk5GamJJapJCal5yfkpmX bqsUGuKma6GkkJeYm2qrFKHrGxKkpFCWmFMK5BkZoAEH5wD3YCV9uwS3jH9r4wu+m1Y8fXGf vYHxoVYXIyeHhICJxOln91kgbDGJC/fWs3UxcnEICcxilFi0ZSOU84NRYuLZlWBVbAJaEvtf 3ABLiAg0MUo0XJjLCOIwC1xllNi4eAqQw8EhLBAtcXMpG0gDi4CqxL6V58CaeQVcJM58vcAM sU5O4sOeR+wgNqeAq0TD11lgcSGgmk1dHcwTGHkXMDKsYpRILUguKE5KzzXMSy3XK07MLS7N S9dLzs/dxAiOjGdSOxgP7nI/xCjAwajEw/vC2CFCiDWxrLgy9xCjBAezkgjvZznHCCHelMTK qtSi/Pii0pzU4kOMpkCHTWSWEk3OB0ZtXkm8oYm5ibmxgYW5paWJkZI4b+PsZ+FCAumJJanZ qakFqUUwfUwcnFINjLlzo2r4rwvWX7VXVVthYsKsF/p/UbZB6mHJ4Oqdj6vNZT3qpOMMwm7N 1U4t3mnH/jbSRigpeIfPPuXXh/LqzLnMtwnafufP0hYKnTRXy5xFL8d108vlIt/89J+L6691 fjVB807/xr6UmEsxLG/rPqvLOO1tirnfcugPs3PzXsXV4ezrLS8rsRRnJBpqMRcVJwIAHbrI nqICAAA= X-MTR: 20000000000000000@CPGS X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161201_231838_183766_A3192479 X-CRM114-Status: GOOD ( 15.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, cw00.choi@samsung.com, kyungmin.park@samsung.com, myungjoo.ham@samsung.com, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the bus nodes using VDD_INT for Exynos5433 SoC. Exynos5433 has the following AMBA AXI buses to translate data between DRAM and sub-blocks. Following list specify the detailed correlation between sub-block and clock: - CLK_ACLK_G2D_{400|266} : Bus clock for G2D - CLK_ACLK_MSCL_400 : Bus clock for MSCL (Mobile Scaler) - CLK_ACLK_GSCL_333 : Bus clock for GSCL (General Scaler) - CLK_SCLK_JPEG_MSCL : Bus clock for JPEG - CLK_ACLK_MFC_400 : Bus clock for MFC (Multi Format Codec) - CLK_ACLK_HEVC_400 : Bus clock for HEVC (High Effective Video Codec) - CLK_ACLK_BUS0_400 : NoC(Network On Chip)'s bus clock for PERIC/PERIS/FSYS/MSCL - CLK_ACLK_BUS1_400 : NoC's bus clock for MFC/HEVC/G3D - CLK_ACLK_BUS2_400 : NoC's bus clock for GSCL/DISP/G2D/CAM0/CAM1/ISP Signed-off-by: Chanwoo Choi --- arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 208 +++++++++++++++++++++++++ arch/arm64/boot/dts/exynos/exynos5433.dtsi | 1 + 2 files changed, 209 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi new file mode 100644 index 000000000000..b1e1d9c622e1 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi @@ -0,0 +1,208 @@ +/* + * Samsung's Exynos5433 SoC Memory interface and AMBA bus device tree source + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * Chanwoo Choi + * + * Samsung's Exynos5433 SoC Memory interface and AMBA buses are listed + * as device tree nodes are listed in this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + /* INT (Internal) block using VDD_INT */ + bus_g2d_400: bus_g2d_400 { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_ACLK_G2D_400>; + clock-names = "bus"; + operating-points-v2 = <&bus_g2d_400_opp_table>; + status ="disable"; + }; + + bus_mscl: bus_mscl { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_ACLK_MSCL_400>; + clock-names = "bus"; + operating-points-v2 = <&bus_g2d_400_opp_table>; + status ="disable"; + }; + + bus_jpeg: bus_jpeg { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>; + clock-names = "bus"; + operating-points-v2 = <&bus_g2d_400_opp_table>; + status ="disable"; + }; + + bus_mfc: bus_mfc { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_ACLK_MFC_400>; + + clock-names = "bus"; + operating-points-v2 = <&bus_g2d_400_opp_table>; + status ="disable"; + }; + + bus_g2d_266: bus_g2d_266 { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_ACLK_G2D_266>; + clock-names = "bus"; + operating-points-v2 = <&bus_g2d_266_opp_table>; + status ="disable"; + }; + + bus_gscl: bus_gscl { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_ACLK_GSCL_333>; + clock-names = "bus"; + operating-points-v2 = <&bus_gscl_opp_table>; + status ="disable"; + }; + + bus_hevc: bus_hevc { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_ACLK_HEVC_400>; + clock-names = "bus"; + operating-points-v2 = <&bus_hevc_opp_table>; + status ="disable"; + }; + + bus_bus0: bus_bus0 { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_ACLK_BUS0_400>; + clock-names = "bus"; + operating-points-v2 = <&bus_hevc_opp_table>; + status ="disable"; + }; + + bus_bus1: bus_bus1 { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_top CLK_ACLK_BUS1_400>; + clock-names = "bus"; + operating-points-v2 = <&bus_hevc_opp_table>; + status ="disable"; + }; + + bus_bus2: bus_bus2 { + compatible = "samsung,exynos-bus"; + clocks = <&cmu_mif CLK_ACLK_BUS2_400>; + clock-names = "bus"; + operating-points-v2 = <&bus_bus2_opp_table>; + status ="disable"; + }; + + bus_g2d_400_opp_table: opp_table2 { + compatible = "operating-points-v2"; + opp-shared; + + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1075000>; + }; + opp@267000000 { + opp-hz = /bits/ 64 <267000000>; + opp-microvolt = <1000000>; + }; + opp@200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <975000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <962500>; + }; + opp@134000000 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <950000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <937500>; + }; + }; + + bus_g2d_266_opp_table: opp_table3 { + compatible = "operating-points-v2"; + + opp@267000000 { + opp-hz = /bits/ 64 <267000000>; + }; + opp@200000000 { + opp-hz = /bits/ 64 <200000000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + }; + opp@134000000 { + opp-hz = /bits/ 64 <134000000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + }; + }; + + bus_gscl_opp_table: opp_table4 { + compatible = "operating-points-v2"; + + opp@333000000 { + opp-hz = /bits/ 64 <333000000>; + }; + opp@222000000 { + opp-hz = /bits/ 64 <222000000>; + }; + opp@166500000 { + opp-hz = /bits/ 64 <166500000>; + }; + }; + + bus_hevc_opp_table: opp_table5 { + compatible = "operating-points-v2"; + opp-shared; + + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1075000>; + }; + opp@267000000 { + opp-hz = /bits/ 64 <267000000>; + opp-microvolt = <1075000>; + }; + opp@200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <1075000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <1075000>; + }; + opp@134000000 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <1075000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <1075000>; + }; + }; + + bus_bus2_opp_table: opp_table6 { + compatible = "operating-points-v2"; + + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + }; + opp@200000000 { + opp-hz = /bits/ 64 <200000000>; + }; + opp@134000000 { + opp-hz = /bits/ 64 <134000000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 8c4ee84d5232..68f764e5851c 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1482,5 +1482,6 @@ }; }; +#include "exynos5433-bus.dtsi" #include "exynos5433-pinctrl.dtsi" #include "exynos5433-tmu.dtsi"