From patchwork Fri Dec 2 15:05:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Murzin X-Patchwork-Id: 9458779 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5C50360236 for ; Fri, 2 Dec 2016 15:19:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4E2D2284E2 for ; Fri, 2 Dec 2016 15:19:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 42FBC2855C; Fri, 2 Dec 2016 15:19:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0C8F3284E2 for ; Fri, 2 Dec 2016 15:19:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCpbJ-0008DR-VI; Fri, 02 Dec 2016 15:18:14 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCpQH-00054T-4x for linux-arm-kernel@bombadil.infradead.org; Fri, 02 Dec 2016 15:06:49 +0000 Received: from foss.arm.com ([217.140.101.70]) by casper.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCpQ9-0002qN-2R for linux-arm-kernel@lists.infradead.org; Fri, 02 Dec 2016 15:06:44 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E93861682; Fri, 2 Dec 2016 07:06:05 -0800 (PST) Received: from bc-a7-1-1.euhpc.arm.com. (bc-a7-1-1.euhpc.arm.com [10.6.3.165]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 58F183F24D; Fri, 2 Dec 2016 07:06:05 -0800 (PST) From: Vladimir Murzin To: linux-arm-kernel@lists.infradead.org Subject: [RFC v3 PATCH 10/25] ARM: NOMMU: implement secondary_startup_arm Date: Fri, 2 Dec 2016 15:05:28 +0000 Message-Id: <1480691143-19845-11-git-send-email-vladimir.murzin@arm.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1480691143-19845-1-git-send-email-vladimir.murzin@arm.com> References: <1480691143-19845-1-git-send-email-vladimir.murzin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161202_150641_299027_CAC85ABA X-CRM114-Status: GOOD ( 10.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Russell King , arnd@arndb.de MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Mediatek's and Qualcomm's platform code has reference to secondary_startup_arm and that breaks NOMMU build. Since head-nommu.S is common, we need to take extra care of M-class platforms since there are no ARM instructions avaliable there. Even though secondary_startup_arm is build it in SMP configuration only (which is not supported by M-class) it'd be better to be on the safe side and handle Thumb-only case there - keep in Thumb mode and fall through to secondary_startup. Cc: Russell King Signed-off-by: Vladimir Murzin --- arch/arm/kernel/head-nommu.S | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index ae80c71..f5bb554 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S @@ -88,7 +88,17 @@ ENTRY(stext) ENDPROC(stext) #ifdef CONFIG_SMP - .text +#ifdef CONFIG_CPU_THUMBONLY + .thumb +ENTRY(secondary_startup_arm) +#else + .arm +ENTRY(secondary_startup_arm) + THUMB( badr r9, 1f ) @ Kernel is entered in ARM. + THUMB( bx r9 ) @ If this is a Thumb-2 kernel, + THUMB( .thumb ) @ switch to Thumb now. + THUMB(1: ) +#endif ENTRY(secondary_startup) /* * Common entry point for secondary CPUs. @@ -126,6 +136,7 @@ ENTRY(secondary_startup) mov fp, #0 b secondary_start_kernel ENDPROC(secondary_startup) +ENDPROC(secondary_startup_arm) .type __secondary_data, %object __secondary_data: