From patchwork Fri Dec 2 15:05:31 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Murzin X-Patchwork-Id: 9458781 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9EA3D60236 for ; Fri, 2 Dec 2016 15:20:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 918FC284E2 for ; Fri, 2 Dec 2016 15:20:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 862FF28542; Fri, 2 Dec 2016 15:20:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id ED8CF284E2 for ; Fri, 2 Dec 2016 15:20:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCpcA-0000XJ-GV; Fri, 02 Dec 2016 15:19:06 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCpQH-0004yz-Bf for linux-arm-kernel@lists.infradead.org; Fri, 02 Dec 2016 15:06:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6BAE116BA; Fri, 2 Dec 2016 07:06:08 -0800 (PST) Received: from bc-a7-1-1.euhpc.arm.com. (bc-a7-1-1.euhpc.arm.com [10.6.3.165]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CF5163F24D; Fri, 2 Dec 2016 07:06:07 -0800 (PST) From: Vladimir Murzin To: linux-arm-kernel@lists.infradead.org Subject: [RFC v3 PATCH 13/25] ARM: sleep: allow it to be build for R-class Date: Fri, 2 Dec 2016 15:05:31 +0000 Message-Id: <1480691143-19845-14-git-send-email-vladimir.murzin@arm.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1480691143-19845-1-git-send-email-vladimir.murzin@arm.com> References: <1480691143-19845-1-git-send-email-vladimir.murzin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161202_070649_560552_EA6AF9F8 X-CRM114-Status: UNSURE ( 7.37 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Russell King , arnd@arndb.de MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP cpu_resume_arm was guarded with CONFIG_MMU in 2678bb9fa13 (ARM: fix EFM32 build breakage caused by cpu_resume_arm) in response to broken build for EFM32 platform which has M-class cpu. It turned out that this dependency on MMU is quite strict and prevent R-class from being built. The root cause of build breakage for M-class is that there is no ARM instructions supported there. So instead of limiting cpu_resume_arm to MMU only build, lets handle M-class case properly - keep in Thumb mode and fall through to cpu_resume. Cc: Russell King Signed-off-by: Vladimir Murzin --- arch/arm/kernel/sleep.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index 0f6c100..41b512d 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S @@ -119,7 +119,10 @@ ENDPROC(cpu_resume_after_mmu) .text .align -#ifdef CONFIG_MMU +#ifdef CONFIG_CPU_THUMBONLY + .thumb +ENTRY(cpu_resume_arm) +#else .arm ENTRY(cpu_resume_arm) THUMB( badr r9, 1f ) @ Kernel is entered in ARM. @@ -159,10 +162,7 @@ THUMB( ldmia r0!, {r1, r2, r3} ) THUMB( mov sp, r2 ) THUMB( bx r3 ) ENDPROC(cpu_resume) - -#ifdef CONFIG_MMU ENDPROC(cpu_resume_arm) -#endif .align 2 _sleep_save_sp: