From patchwork Fri Dec 2 15:05:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Murzin X-Patchwork-Id: 9458791 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8106F60585 for ; Fri, 2 Dec 2016 15:24:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 73C6028542 for ; Fri, 2 Dec 2016 15:24:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 680B128556; Fri, 2 Dec 2016 15:24:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C5DC328542 for ; Fri, 2 Dec 2016 15:24:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCpfD-0004LJ-IP; Fri, 02 Dec 2016 15:22:15 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cCpQR-00053c-C5 for linux-arm-kernel@lists.infradead.org; Fri, 02 Dec 2016 15:07:10 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D27B619F6; Fri, 2 Dec 2016 07:06:12 -0800 (PST) Received: from bc-a7-1-1.euhpc.arm.com. (bc-a7-1-1.euhpc.arm.com [10.6.3.165]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1F9493F24D; Fri, 2 Dec 2016 07:06:11 -0800 (PST) From: Vladimir Murzin To: linux-arm-kernel@lists.infradead.org Subject: [RFC v3 PATCH 18/25] ARM: sa1100: move CPU specific copy code under its own config Date: Fri, 2 Dec 2016 15:05:36 +0000 Message-Id: <1480691143-19845-19-git-send-email-vladimir.murzin@arm.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1480691143-19845-1-git-send-email-vladimir.murzin@arm.com> References: <1480691143-19845-1-git-send-email-vladimir.murzin@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161202_070659_768209_5059929B X-CRM114-Status: UNSURE ( 9.94 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linus Walleij , Russell King , arnd@arndb.de MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP By now there is no way to limit sa1100 specific copy code to MMU only builds and that leads to the following error when built for NOMMU arch/arm/mm/copypage-v4mc.c:26:35: error: 'L_PTE_PRESENT' undeclared (first use in this function) #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ ^ ./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot' #define __pgprot(x) (x) ^ arch/arm/mm/copypage-v4mc.c:77:47: note: in expansion of macro 'minicache_pgprot' set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot)); ^ arch/arm/mm/copypage-v4mc.c:26:51: error: 'L_PTE_YOUNG' undeclared (first use in this function) #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ ^ ./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot' #define __pgprot(x) (x) ^ arch/arm/mm/copypage-v4mc.c:77:47: note: in expansion of macro 'minicache_pgprot' set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot)); ^ arch/arm/mm/copypage-v4mc.c:27:7: error: 'L_PTE_MT_MINICACHE' undeclared (first use in this function) L_PTE_MT_MINICACHE) ^ ./arch/arm/include/asm/page-nommu.h:41:26: note: in definition of macro '__pgprot' #define __pgprot(x) (x) ^ arch/arm/mm/copypage-v4mc.c:77:47: note: in expansion of macro 'minicache_pgprot' set_top_pte(COPYPAGE_MINICACHE, mk_pte(from, minicache_pgprot)); ^ arch/arm/mm/copypage-v4mc.c: At top level: arch/arm/mm/copypage-v4mc.c:112:8: error: variable 'v4_mc_user_fns' has initializer but incomplete type struct cpu_user_fns v4_mc_user_fns __initdata = { ^ arch/arm/mm/copypage-v4mc.c:113:2: error: unknown field 'cpu_clear_user_highpage' specified in initializer .cpu_clear_user_highpage = v4_mc_clear_user_highpage, ^ arch/arm/mm/copypage-v4mc.c:113:2: warning: excess elements in struct initializer arch/arm/mm/copypage-v4mc.c:113:2: warning: (near initialization for 'v4_mc_user_fns') arch/arm/mm/copypage-v4mc.c:114:2: error: unknown field 'cpu_copy_user_highpage' specified in initializer .cpu_copy_user_highpage = v4_mc_copy_user_highpage, ^ arch/arm/mm/copypage-v4mc.c:114:2: warning: excess elements in struct initializer arch/arm/mm/copypage-v4mc.c:114:2: warning: (near initialization for 'v4_mc_user_fns') cc1: some warnings being treated as errors make[1]: *** [arch/arm/mm/copypage-v4mc.o] Error 1 make: *** [arch/arm/mm] Error 2 Move that code under CPU_COPY_V4MC config option which we can guard against NOMMU configuration. Cc: Russell King Cc: Linus Walleij Signed-off-by: Vladimir Murzin --- arch/arm/include/asm/page.h | 2 +- arch/arm/mm/Kconfig | 4 ++++ arch/arm/mm/Makefile | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h index 4355f0e..6ec7bb6 100644 --- a/arch/arm/include/asm/page.h +++ b/arch/arm/include/asm/page.h @@ -75,7 +75,7 @@ # endif #endif -#ifdef CONFIG_CPU_SA1100 +#ifdef CONFIG_CPU_COPY_V4MC # ifdef _USER # define MULTI_USER 1 # else diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index c1799dd..6dffbe4 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -290,6 +290,7 @@ config CPU_SA1100 select CPU_ABRT_EV4 select CPU_CACHE_V4WB select CPU_CACHE_VIVT + select CPU_COPY_V4MC if MMU select CPU_CP15_MMU select CPU_PABRT_LEGACY select CPU_TLB_V4WB if MMU @@ -524,6 +525,9 @@ config CPU_CACHE_V7M if MMU # The copy-page model +config CPU_COPY_V4MC + bool + config CPU_COPY_V4WT bool diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index e869824..2ac7988 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -53,7 +53,7 @@ obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o obj-$(CONFIG_CPU_COPY_FEROCEON) += copypage-feroceon.o obj-$(CONFIG_CPU_COPY_V6) += copypage-v6.o context.o -obj-$(CONFIG_CPU_SA1100) += copypage-v4mc.o +obj-$(CONFIG_CPU_COPY_V4MC) += copypage-v4mc.o obj-$(CONFIG_CPU_XSCALE) += copypage-xscale.o obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o obj-$(CONFIG_CPU_COPY_FA) += copypage-fa.o