@@ -241,29 +241,6 @@
brcm,nand-has-wp;
};
- gpiob: gpio@30000 {
- compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
- reg = <0x30000 0x50>;
- #gpio-cells = <2>;
- gpio-controller;
- ngpios = <4>;
- interrupt-controller;
- interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- pwm: pwm@31000 {
- compatible = "brcm,iproc-pwm";
- reg = <0x31000 0x28>;
- clocks = <&osc>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- rng: rng@33000 {
- compatible = "brcm,bcm-nsp-rng";
- reg = <0x33000 0x14>;
- };
-
qspi: qspi@27200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
reg = <0x027200 0x184>,
@@ -293,6 +270,29 @@
#size-cells = <0>;
};
+ gpiob: gpio@30000 {
+ compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
+ reg = <0x30000 0x50>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ ngpios = <4>;
+ interrupt-controller;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pwm: pwm@31000 {
+ compatible = "brcm,iproc-pwm";
+ reg = <0x31000 0x28>;
+ clocks = <&osc>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ rng: rng@33000 {
+ compatible = "brcm,bcm-nsp-rng";
+ reg = <0x33000 0x14>;
+ };
+
ccbtimer0: timer@34000 {
compatible = "arm,sp804";
reg = <0x34000 0x1000>;
@@ -65,7 +65,6 @@
status = "okay";
};
-
&amac1 {
status = "okay";
};
@@ -65,7 +65,6 @@
status = "okay";
};
-
&amac1 {
status = "okay";
};
@@ -59,6 +59,8 @@
};
};
+/* XHCI, MMC, and Ethernet support needed to be complete */
+
&i2c0 {
temperature-sensor@4c {
compatible = "adi,adt7461a";
@@ -115,12 +117,6 @@
};
};
-/* XHCI, MMC, and Ethernet support needed to be complete */
-
-&uart0 {
- status = "okay";
-};
-
&pcie0 {
status = "okay";
};
@@ -129,6 +125,15 @@
status = "okay";
};
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_sel>;
+ nand_sel: nand_sel {
+ function = "nand";
+ groups = "nand_grp";
+ };
+};
+
&sata_phy0 {
status = "okay";
};
@@ -141,11 +146,6 @@
status = "okay";
};
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&nand_sel>;
- nand_sel: nand_sel {
- function = "nand";
- groups = "nand_grp";
- };
+&uart0 {
+ status = "okay";
};
@@ -120,6 +120,14 @@
};
};
+&sata_phy0 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
&srab {
compatible = "brcm,bcm58623-srab", "brcm,nsp-srab";
status = "okay";
@@ -165,14 +173,6 @@
};
};
-&sata_phy0 {
- status = "okay";
-};
-
-&sata {
- status = "okay";
-};
-
&uart0 {
status = "okay";
};
@@ -1,7 +1,7 @@
/*
* BSD LICENSE
*
- * Copyright (c) 2016 Broadcom. All rights reserved.
+ * Copyright(c) 2016 Broadcom. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -59,6 +59,10 @@
};
};
+&amac0 {
+ status = "okay";
+};
+
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@@ -97,10 +101,6 @@
};
};
-&uart0 {
- status = "okay";
-};
-
&pcie0 {
status = "okay";
};
@@ -118,7 +118,15 @@
};
};
-&amac0 {
+&sata_phy0 {
+ status = "okay";
+};
+
+&sata_phy1 {
+ status = "okay";
+};
+
+&sata {
status = "okay";
};
@@ -167,14 +175,6 @@
};
};
-&sata_phy0 {
- status = "okay";
-};
-
-&sata_phy1 {
- status = "okay";
-};
-
-&sata {
+&uart0 {
status = "okay";
};
@@ -53,14 +53,6 @@
};
};
-&uart0 {
- status = "okay";
-};
-
-&uart1 {
- status = "okay";
-};
-
&amac0 {
status = "okay";
};
@@ -69,30 +61,6 @@
status = "okay";
};
-&pcie0 {
- status = "okay";
-};
-
-&pcie1 {
- status = "okay";
-};
-
-&pcie2 {
- status = "okay";
-};
-
-&sata_phy0 {
- status = "okay";
-};
-
-&sata_phy1 {
- status = "okay";
-};
-
-&sata {
- status = "okay";
-};
-
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@@ -131,6 +99,18 @@
};
};
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&pcie2 {
+ status = "okay";
+};
+
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&nand_sel>;
@@ -173,3 +153,23 @@
};
};
};
+
+&sata_phy0 {
+ status = "okay";
+};
+
+&sata_phy1 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
The QSPI entry was added out of the sequental order that the rest of the DTSI file is in. Move it to make it fit in properly. Also, some other entries have been added in a non-alphabetical order in the DTS files, making them different from the other NSP DTS files. Move the relevant peices to make it match. Finally, remove errant new lines. Signed-off-by: Jon Mason <jon.mason@broadcom.com> --- arch/arm/boot/dts/bcm-nsp.dtsi | 46 +++++++++++++-------------- arch/arm/boot/dts/bcm958522er.dts | 1 - arch/arm/boot/dts/bcm958525er.dts | 1 - arch/arm/boot/dts/bcm958525xmc.dts | 26 ++++++++-------- arch/arm/boot/dts/bcm958623hr.dts | 16 +++++----- arch/arm/boot/dts/bcm958625hr.dts | 30 +++++++++--------- arch/arm/boot/dts/bcm958625k.dts | 64 +++++++++++++++++++------------------- 7 files changed, 91 insertions(+), 93 deletions(-)