Message ID | 1483018611-27998-3-git-send-email-b.zolnierkie@samsung.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Thu, Dec 29, 2016 at 02:36:51PM +0100, Bartlomiej Zolnierkiewicz wrote: > Add CPU operating points for Exynos4412 Prime (it supports > additional 1704MHz & 1600MHz OPPs and 1500MHz OPP is just > a regular non-turbo OPP on this SoC). Also update relevant > cooling maps to account for new OPPs. > > ODROID-X2/U2/U3 boards use Exynos4412 Prime SoC version so > update their board files accordingly. > > Based on Hardkernel's kernel for ODROID-X2/U2/U3 boards. > > Cc: Doug Anderson <dianders@chromium.org> > Cc: Andreas Faerber <afaerber@suse.de> > Cc: Thomas Abraham <thomas.ab@samsung.com> > Cc: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> > Cc: Ben Gamari <ben@smart-cactus.org> > Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> > --- > arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 +-- > arch/arm/boot/dts/exynos4412-odroidu3.dts | 5 +-- > arch/arm/boot/dts/exynos4412-odroidx2.dts | 1 + > arch/arm/boot/dts/exynos4412-prime.dtsi | 41 +++++++++++++++++++++++++ > arch/arm/boot/dts/exynos4412.dtsi | 2 +- > 5 files changed, 48 insertions(+), 5 deletions(-) > create mode 100644 arch/arm/boot/dts/exynos4412-prime.dtsi > Looks okay. Is the clock patch needed for this? BR, Krzysztof
Hi, On Thursday, December 29, 2016 04:49:08 PM Krzysztof Kozlowski wrote: > On Thu, Dec 29, 2016 at 02:36:51PM +0100, Bartlomiej Zolnierkiewicz wrote: > > Add CPU operating points for Exynos4412 Prime (it supports > > additional 1704MHz & 1600MHz OPPs and 1500MHz OPP is just > > a regular non-turbo OPP on this SoC). Also update relevant > > cooling maps to account for new OPPs. > > > > ODROID-X2/U2/U3 boards use Exynos4412 Prime SoC version so > > update their board files accordingly. > > > > Based on Hardkernel's kernel for ODROID-X2/U2/U3 boards. > > > > Cc: Doug Anderson <dianders@chromium.org> > > Cc: Andreas Faerber <afaerber@suse.de> > > Cc: Thomas Abraham <thomas.ab@samsung.com> > > Cc: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> > > Cc: Ben Gamari <ben@smart-cactus.org> > > Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> > > --- > > arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 +-- > > arch/arm/boot/dts/exynos4412-odroidu3.dts | 5 +-- > > arch/arm/boot/dts/exynos4412-odroidx2.dts | 1 + > > arch/arm/boot/dts/exynos4412-prime.dtsi | 41 +++++++++++++++++++++++++ > > arch/arm/boot/dts/exynos4412.dtsi | 2 +- > > 5 files changed, 48 insertions(+), 5 deletions(-) > > create mode 100644 arch/arm/boot/dts/exynos4412-prime.dtsi > > > > Looks okay. Is the clock patch needed for this? Yep. Best regards, -- Bartlomiej Zolnierkiewicz Samsung R&D Institute Poland Samsung Electronics
On Thu, Dec 29, 2016 at 05:23:34PM +0100, Sylwester Nawrocki wrote: > On 12/29/2016 04:06 PM, Bartlomiej Zolnierkiewicz wrote: > >>> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> > >>> --- > >>> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 +-- > >>> arch/arm/boot/dts/exynos4412-odroidu3.dts | 5 +-- > >>> arch/arm/boot/dts/exynos4412-odroidx2.dts | 1 + > >>> arch/arm/boot/dts/exynos4412-prime.dtsi | 41 +++++++++++++++++++++++++ > >>> arch/arm/boot/dts/exynos4412.dtsi | 2 +- > >>> 5 files changed, 48 insertions(+), 5 deletions(-) > >>> create mode 100644 arch/arm/boot/dts/exynos4412-prime.dtsi > >>> > >> Looks okay. Is the clock patch needed for this? > > Yep. > > I applied the clock patch and here is a stable tag if it needs > to be pulled as a dependency. > Thanks, merged! BR, Krzysztof
On Thu, Dec 29, 2016 at 04:06:20PM +0100, Bartlomiej Zolnierkiewicz wrote: > On Thursday, December 29, 2016 04:49:08 PM Krzysztof Kozlowski wrote: > > On Thu, Dec 29, 2016 at 02:36:51PM +0100, Bartlomiej Zolnierkiewicz wrote: > > > Add CPU operating points for Exynos4412 Prime (it supports > > > additional 1704MHz & 1600MHz OPPs and 1500MHz OPP is just > > > a regular non-turbo OPP on this SoC). Also update relevant > > > cooling maps to account for new OPPs. > > > > > > ODROID-X2/U2/U3 boards use Exynos4412 Prime SoC version so > > > update their board files accordingly. > > > > > > Based on Hardkernel's kernel for ODROID-X2/U2/U3 boards. > > > > > > Cc: Doug Anderson <dianders@chromium.org> > > > Cc: Andreas Faerber <afaerber@suse.de> > > > Cc: Thomas Abraham <thomas.ab@samsung.com> > > > Cc: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> > > > Cc: Ben Gamari <ben@smart-cactus.org> > > > Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> > > > --- > > > arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 +-- > > > arch/arm/boot/dts/exynos4412-odroidu3.dts | 5 +-- > > > arch/arm/boot/dts/exynos4412-odroidx2.dts | 1 + > > > arch/arm/boot/dts/exynos4412-prime.dtsi | 41 +++++++++++++++++++++++++ > > > arch/arm/boot/dts/exynos4412.dtsi | 2 +- > > > 5 files changed, 48 insertions(+), 5 deletions(-) > > > create mode 100644 arch/arm/boot/dts/exynos4412-prime.dtsi > > > > > > > Looks okay. Is the clock patch needed for this? > > Yep. Thanks, applied. Best regards, Krzysztof
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 8aa19ba..5282d69e 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -97,11 +97,11 @@ thermal-zones { cpu_thermal: cpu-thermal { cooling-maps { - map0 { + cooling_map0: map0 { /* Corresponds to 800MHz at freq_table */ cooling-device = <&cpu0 7 7>; }; - map1 { + cooling_map1: map1 { /* Corresponds to 200MHz at freq_table */ cooling-device = <&cpu0 13 13>; }; diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts index 99634c5..7504a5a 100644 --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts @@ -13,6 +13,7 @@ /dts-v1/; #include "exynos4412-odroid-common.dtsi" +#include "exynos4412-prime.dtsi" / { model = "Hardkernel ODROID-U3 board based on Exynos4412"; @@ -47,11 +48,11 @@ cooling-maps { map0 { trip = <&cpu_alert1>; - cooling-device = <&cpu0 7 7>; + cooling-device = <&cpu0 9 9>; }; map1 { trip = <&cpu_alert2>; - cooling-device = <&cpu0 13 13>; + cooling-device = <&cpu0 15 15>; }; map2 { trip = <&cpu_alert0>; diff --git a/arch/arm/boot/dts/exynos4412-odroidx2.dts b/arch/arm/boot/dts/exynos4412-odroidx2.dts index 4d22885..d6e92ebc 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx2.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx2.dts @@ -12,6 +12,7 @@ */ #include "exynos4412-odroidx.dts" +#include "exynos4412-prime.dtsi" / { model = "Hardkernel ODROID-X2 board based on Exynos4412"; diff --git a/arch/arm/boot/dts/exynos4412-prime.dtsi b/arch/arm/boot/dts/exynos4412-prime.dtsi new file mode 100644 index 0000000..e75bc17 --- /dev/null +++ b/arch/arm/boot/dts/exynos4412-prime.dtsi @@ -0,0 +1,41 @@ +/* + * Samsung's Exynos4412 Prime SoC device tree source + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Exynos4412 Prime SoC revision supports higher CPU frequencies than + * non-Prime version. Therefore we need to update OPPs table and + * thermal maps accordingly. + */ + +&cpu0_opp_1500 { + /delete-property/turbo-mode; +}; + +&cpu0_opp_table { + opp@1600000000 { + opp-hz = /bits/ 64 <1600000000>; + opp-microvolt = <1350000>; + clock-latency-ns = <200000>; + }; + opp@1704000000 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <1350000>; + clock-latency-ns = <200000>; + }; +}; + +&cooling_map0 { + cooling-device = <&cpu0 9 9>; +}; + +&cooling_map1 { + cooling-device = <&cpu0 15 15>; +}; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 40beede..3ebdf01 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -130,7 +130,7 @@ opp-microvolt = <1287500>; clock-latency-ns = <200000>; }; - opp@1500000000 { + cpu0_opp_1500: opp@1500000000 { opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <1350000>; clock-latency-ns = <200000>;
Add CPU operating points for Exynos4412 Prime (it supports additional 1704MHz & 1600MHz OPPs and 1500MHz OPP is just a regular non-turbo OPP on this SoC). Also update relevant cooling maps to account for new OPPs. ODROID-X2/U2/U3 boards use Exynos4412 Prime SoC version so update their board files accordingly. Based on Hardkernel's kernel for ODROID-X2/U2/U3 boards. Cc: Doug Anderson <dianders@chromium.org> Cc: Andreas Faerber <afaerber@suse.de> Cc: Thomas Abraham <thomas.ab@samsung.com> Cc: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Cc: Ben Gamari <ben@smart-cactus.org> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> --- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 +-- arch/arm/boot/dts/exynos4412-odroidu3.dts | 5 +-- arch/arm/boot/dts/exynos4412-odroidx2.dts | 1 + arch/arm/boot/dts/exynos4412-prime.dtsi | 41 +++++++++++++++++++++++++ arch/arm/boot/dts/exynos4412.dtsi | 2 +- 5 files changed, 48 insertions(+), 5 deletions(-) create mode 100644 arch/arm/boot/dts/exynos4412-prime.dtsi