From patchwork Wed Jan 4 09:47:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Leach X-Patchwork-Id: 9496359 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3E611606B5 for ; Wed, 4 Jan 2017 09:49:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3DDAB27B13 for ; Wed, 4 Jan 2017 09:49:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 323B727D85; Wed, 4 Jan 2017 09:49:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BD57F27B13 for ; Wed, 4 Jan 2017 09:49:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1cOiAY-0006tJ-Dq; Wed, 04 Jan 2017 09:47:42 +0000 Received: from mail-wj0-x231.google.com ([2a00:1450:400c:c01::231]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1cOiAU-0006qR-6T for linux-arm-kernel@lists.infradead.org; Wed, 04 Jan 2017 09:47:39 +0000 Received: by mail-wj0-x231.google.com with SMTP id c11so259826825wjx.3 for ; Wed, 04 Jan 2017 01:47:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=LgeJ6NDt7MdUb/NtMWeg3dGN8PAmk9SqnvRsN2gmicM=; b=ZUsZ7qkAYDpT6FIlBba7qHXFRmZ3gQBLcbbYoyW/VuviK+6wi08SdqbGCBHBVyayZx Qe7yThQQXnpC3A3RFGswKrqRDn5GWXU+nNY0nhohppHAwjwk8y8QEkrdeBZPeVLRLXNM fuCSgK6qkJbaHUedhFbBM2hdtINj43U4Earvs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=LgeJ6NDt7MdUb/NtMWeg3dGN8PAmk9SqnvRsN2gmicM=; b=coh+6+CcnQa5z0OPs5mTJX3LmF2fHNP5mNqBAelYj8CyTVt0jFcQfhEDaAqbdJvH5z tvblcbkqBJSS/jrt3LTqTVC96ioU0nvOfIPLifFIQW06ItkcYBm06cJwwmCnxFUqo+oY RTsVeg7P1kWPaQ1A3Vz78pAISYDuT99Xbqo+E4DiU1SPfTfDeViHYKI1wPdh33S7qC0Q I1hCOmnY6F6EDYpGHrwqiod4Ob5E0ZHAJF6XRu1pEYBWQOg+J0AmqpaYp/BZEFTu4bBa 5N5/v0oUzL18Sg+TxMFScJHFRo6gRqrBviPMQs4r5tNIsvwBFBdKTxiW3NGwaBhXjhFI s2UA== X-Gm-Message-State: AIkVDXIsHiDOIo3dq/GT1H8MJ0tKnVXG5gV2Q9MbiZnzATeexO0Amv77tT1uqMtUxJfKD8se X-Received: by 10.194.146.228 with SMTP id tf4mr56432805wjb.183.1483523235577; Wed, 04 Jan 2017 01:47:15 -0800 (PST) Received: from linaro.org (cpc80201-blbn11-2-0-cust167.10-1.cable.virginm.net. [86.6.126.168]) by smtp.gmail.com with ESMTPSA id kq7sm97275968wjb.30.2017.01.04.01.47.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 04 Jan 2017 01:47:15 -0800 (PST) From: Mike Leach To: mathieu.poirier@linaro.org Subject: [PATCH v2] coresight: etm4x: Fix enabling of cycle accurate tracing in perf. Date: Wed, 4 Jan 2017 09:47:11 +0000 Message-Id: <1483523231-23993-1-git-send-email-mike.leach@linaro.org> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170104_014738_444203_01C2EF62 X-CRM114-Status: GOOD ( 12.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Mike Leach MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Using perf record 'cyclacc' option in cs_etm event was not setting up cycle accurate trace correctly. Corrects bit set in TRCCONFIGR to enable cycle accurate trace. Programs TRCCCCTLR with a valid threshold value as required by ETMv4 spec. Signed-off-by: Mike Leach --- drivers/hwtracing/coresight/coresight-etm4x.c | 7 +++++-- drivers/hwtracing/coresight/coresight-etm4x.h | 1 + 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 4db8d6a..c5a65d1 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -216,8 +216,11 @@ static int etm4_parse_event_config(struct etmv4_drvdata *drvdata, goto out; /* Go from generic option to ETMv4 specifics */ - if (attr->config & BIT(ETM_OPT_CYCACC)) - config->cfg |= ETMv4_MODE_CYCACC; + if (attr->config & BIT(ETM_OPT_CYCACC)) { + config->cfg |= BIT(4); + /* TRM: Must program this for cycacc to work */ + config->ccctlr = ETM_CYC_THRESHOLD_DEFAULT; + } if (attr->config & BIT(ETM_OPT_TS)) config->cfg |= ETMv4_MODE_TIMESTAMP; diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index ba8d3f8..b3b5ea7 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -146,6 +146,7 @@ #define ETM_ARCH_V4 0x40 #define ETMv4_SYNC_MASK 0x1F #define ETM_CYC_THRESHOLD_MASK 0xFFF +#define ETM_CYC_THRESHOLD_DEFAULT 0x100 #define ETMv4_EVENT_MASK 0xFF #define ETM_CNTR_MAX_VAL 0xFFFF #define ETM_TRACEID_MASK 0x3f