From patchwork Thu Jan 5 09:25:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 9498753 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 51C5560235 for ; Thu, 5 Jan 2017 09:26:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D90627FB1 for ; Thu, 5 Jan 2017 09:26:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 326E628156; Thu, 5 Jan 2017 09:26:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E7FEF27FB1 for ; Thu, 5 Jan 2017 09:26:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cP4Jy-0005ZM-3q; Thu, 05 Jan 2017 09:26:54 +0000 Received: from mail-wj0-x22e.google.com ([2a00:1450:400c:c01::22e]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cP4JU-0004ca-Uw for linux-arm-kernel@lists.infradead.org; Thu, 05 Jan 2017 09:26:28 +0000 Received: by mail-wj0-x22e.google.com with SMTP id tq7so251999198wjb.0 for ; Thu, 05 Jan 2017 01:26:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YR9Vb5HGJUjpifr3Uk6lzKwcbSkDrS+IMPspec3oD08=; b=F4gThhebylgEfGa0Gf7VSbakprtx44RFDERjzT8iTeCG7Qzoav5zL67V9rED4CWpVd q9BG5THjmbfFvbGfxO7gtAM9yXYQyLcG9XPgk6CzXlQ1MXj58UEqYDoK9BLNihPyDNRx tGW/qL+unUi6IeO/xKTW50MDQb3UHwl1xXELQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YR9Vb5HGJUjpifr3Uk6lzKwcbSkDrS+IMPspec3oD08=; b=PsYTi19s9a5xOV7Ssy6OpQgKPf9dyo0Qa3HAJJKEeGNIPrBebkcy9fUIHxiR4lak4K UPVrVFxRdyC1SE2dBW1fF99Dc7tXeTGDfCyk3A/J3My2/yqFPG8rxpjNZwx9JIqzUUXj 12L9CImHfUuslrLFegP+ML4iEF652HrpWfVxNASXQHWNhlKQ62awR9kauP2ekOulbMLb AZihDd0CiliyTtLFvSoykysVO5KtDxUiawcF9YLhoOozR+S/C5rYcrCpAQqBEqFXaTtD D1HpWhpcVBdnYaMPxDNnQ4rz3a++ZhfySB5Pd7Y6d5wh+79k9UApmZLTLaCfZJJSRx8C S4Xw== X-Gm-Message-State: AIkVDXK0jJPy2wXTtyiv/OjJ4wMAZVnjNEbtlXHNddoAsFo4pclKdN2ZUVY7teECS51r55e/ X-Received: by 10.194.141.98 with SMTP id rn2mr60301064wjb.1.1483608362579; Thu, 05 Jan 2017 01:26:02 -0800 (PST) Received: from lmenx321.st.com. ([80.215.39.25]) by smtp.gmail.com with ESMTPSA id w18sm99401549wme.9.2017.01.05.01.26.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 05 Jan 2017 01:26:02 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 3/8] PWM: add pwm-stm32 DT bindings Date: Thu, 5 Jan 2017 10:25:39 +0100 Message-Id: <1483608344-9012-4-git-send-email-benjamin.gaignard@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1483608344-9012-1-git-send-email-benjamin.gaignard@st.com> References: <1483608344-9012-1-git-send-email-benjamin.gaignard@st.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170105_012625_331439_69F8DDC3 X-CRM114-Status: GOOD ( 13.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linaro-kernel@lists.linaro.org, Benjamin Gaignard , linus.walleij@linaro.org, arnaud.pouliquen@st.com, benjamin.gaignard@linaro.org, gerald.baeza@st.com, fabrice.gasnier@st.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Define bindings for pwm-stm32 version 6: - change st,breakinput parameter format to make it usuable on stm32f7 too. version 2: - use parameters instead of compatible of handle the hardware configuration Signed-off-by: Benjamin Gaignard Acked-by: Rob Herring --- .../devicetree/bindings/pwm/pwm-stm32.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt new file mode 100644 index 0000000..866f222 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt @@ -0,0 +1,33 @@ +STMicroelectronics STM32 Timers PWM bindings + +Must be a sub-node of an STM32 Timers device tree node. +See ../mfd/stm32-timers.txt for details about the parent node. + +Required parameters: +- compatible: Must be "st,stm32-pwm". +- pinctrl-names: Set to "default". +- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module. + For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt + +Optional parameters: +- st,breakinput: Arrays of three u32 to describe break input configurations. + "index" indicates on which break input the configuration should be applied. + "level" gives the active level (0=low or 1=high) for this configuration. + "filter" gives the filtering value to be applied. + +Example: + timers@40010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40010000 0x400>; + clocks = <&rcc 0 160>; + clock-names = "clk_int"; + + pwm { + compatible = "st,stm32-pwm"; + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + st,breakinput = <0 1 5>; + }; + };