From patchwork Sat Jan 28 13:27:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 9543273 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 67BC360429 for ; Sat, 28 Jan 2017 13:28:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4721E27F90 for ; Sat, 28 Jan 2017 13:28:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 27A8C27FBB; Sat, 28 Jan 2017 13:28:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, T_DKIM_INVALID autolearn=no version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 31AFB27F82 for ; Sat, 28 Jan 2017 13:28:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cXT3b-0001vr-Le; Sat, 28 Jan 2017 13:28:43 +0000 Received: from conuserg-12.nifty.com ([210.131.2.79]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cXT3B-0001tv-7r for linux-arm-kernel@lists.infradead.org; Sat, 28 Jan 2017 13:28:20 +0000 Received: from grover.sesame (FL1-111-169-71-157.osk.mesh.ad.jp [111.169.71.157]) (authenticated) by conuserg-12.nifty.com with ESMTP id v0SDR4t0002858; Sat, 28 Jan 2017 22:27:08 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v0SDR4t0002858 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1485610029; bh=uVKzcNRxz5UXK8oGczCHPSlLWexetiOuwETMf06WWl8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=11mHpPcamjS3u/DQj9R+TTsuukTtMTFGMqx1cFkjBBJKz/t4M0zxUysmMmuMk0YM1 ZQ8iXWHBPVs+R8F6Pl/5tfYvT1OSNpiO4rQLU2zxxKxT7zaAHsKKOkIyHiVS4HCqtX sFfnraMODrSC9OIHvjDI7O1cpo2H5JkK+jg+/0cRQFUngOkqUxUGh26KatlIdAKGM8 hSV7PIrNUsN6x0zP/9ZpTlVPmfskeI5cuJBB/KGain54p4sUP8zKU+czOqaZTB+csK mB4yaUTDNfrlxlVHoWCITlG9YJsXkGVPL3HgFE2GJKZhQqF5Lps2TOz1+SfihWXi2X j0z8OEsCOFlhQ== X-Nifty-SrcIP: [111.169.71.157] From: Masahiro Yamada To: linux-clk@vger.kernel.org Subject: [PATCH 2/2] clk: uniphier: add eMMC clock for LD11 and LD20 SoCs Date: Sat, 28 Jan 2017 22:27:01 +0900 Message-Id: <1485610021-9905-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1485610021-9905-1-git-send-email-yamada.masahiro@socionext.com> References: <1485610021-9905-1-git-send-email-yamada.masahiro@socionext.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170128_052817_643265_28A92919 X-CRM114-Status: UNSURE ( 7.48 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Masahiro Yamada , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add clock for the Cadence eMMC controller on LD11/LD20. For the other SoCs, the clock for the eMMC controller is included in the MIO/SD control block. Signed-off-by: Masahiro Yamada --- drivers/clk/uniphier/clk-uniphier-sys.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index b1aaf77..c8027d9 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -35,6 +35,9 @@ #define UNIPHIER_LD11_SYS_CLK_NAND(idx) \ UNIPHIER_CLK_GATE("nand", (idx), NULL, 0x210c, 0) +#define UNIPHIER_LD11_SYS_CLK_EMMC(idx) \ + UNIPHIER_CLK_GATE("emmc", (idx), NULL, 0x210c, 2) + #define UNIPHIER_SLD3_SYS_CLK_STDMAC(idx) \ UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x2104, 10) @@ -144,6 +147,8 @@ const struct uniphier_clk_data uniphier_ld11_sys_clk_data[] = { UNIPHIER_CLK_FACTOR("uart", 0, "spll", 1, 34), UNIPHIER_CLK_FACTOR("i2c", 1, "spll", 1, 40), UNIPHIER_LD11_SYS_CLK_NAND(2), + UNIPHIER_LD11_SYS_CLK_EMMC(4), + /* Index 5 reserved for eMMC PHY */ UNIPHIER_LD11_SYS_CLK_STDMAC(8), /* HSC, MIO */ UNIPHIER_CLK_FACTOR("usb2", -1, "ref", 24, 25), /* CPU gears */ @@ -170,6 +175,8 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { UNIPHIER_CLK_FACTOR("uart", 0, "spll", 1, 34), UNIPHIER_CLK_FACTOR("i2c", 1, "spll", 1, 40), UNIPHIER_LD11_SYS_CLK_NAND(2), + UNIPHIER_LD11_SYS_CLK_EMMC(4), + /* Index 5 reserved for eMMC PHY */ UNIPHIER_LD20_SYS_CLK_SD, UNIPHIER_LD11_SYS_CLK_STDMAC(8), /* HSC */ /* GIO is always clock-enabled: no function for 0x210c bit5 */