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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0301MB0731 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170206_011532_771713_24BA9ECA X-CRM114-Status: GOOD ( 14.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Peter Chen , heiko@sntech.de, stephen.boyd@linaro.org, gary.bisson@boundarydevices.com, Sriram Dash , festevam@gmail.com, stillcompiling@gmail.com, arnd@arndb.de, vaibhav.hiremath@linaro.org, krzk@kernel.org, mka@chromium.org, devicetree@vger.kernel.org, mail@maciej.szmigiero.name, pawel.moll@arm.com, linux-pm@vger.kernel.org, s.hauer@pengutronix.de, troy.kisky@boundarydevices.com, linux-arm-kernel@lists.infradead.org, hverkuil@xs4all.nl, oscar@naiandei.net, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, p.zabel@pengutronix.de Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Set the dma for ehci from sysdev. The sysdev is pointing to device that is known to the system firmware or hardware. Cc: Arnd Bergmann Cc: Sriram Dash Signed-off-by: Peter Chen --- drivers/usb/host/ehci-mem.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/usb/host/ehci-mem.c b/drivers/usb/host/ehci-mem.c index 4de4301..f54478d 100644 --- a/drivers/usb/host/ehci-mem.c +++ b/drivers/usb/host/ehci-mem.c @@ -46,21 +46,21 @@ static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd, INIT_LIST_HEAD (&qtd->qtd_list); } -static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags) +static struct ehci_qtd *ehci_qtd_alloc(struct ehci_hcd *ehci, gfp_t flags) { struct ehci_qtd *qtd; dma_addr_t dma; - qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma); + qtd = dma_pool_alloc(ehci->qtd_pool, flags, &dma); if (qtd != NULL) { ehci_qtd_init(ehci, qtd, dma); } return qtd; } -static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd) +static inline void ehci_qtd_free(struct ehci_hcd *ehci, struct ehci_qtd *qtd) { - dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma); + dma_pool_free(ehci->qtd_pool, qtd, qtd->qtd_dma); } @@ -72,12 +72,12 @@ static void qh_destroy(struct ehci_hcd *ehci, struct ehci_qh *qh) BUG (); } if (qh->dummy) - ehci_qtd_free (ehci, qh->dummy); + ehci_qtd_free(ehci, qh->dummy); dma_pool_free(ehci->qh_pool, qh->hw, qh->qh_dma); kfree(qh); } -static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags) +static struct ehci_qh *ehci_qh_alloc(struct ehci_hcd *ehci, gfp_t flags) { struct ehci_qh *qh; dma_addr_t dma; @@ -96,7 +96,7 @@ static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags) INIT_LIST_HEAD(&qh->unlink_node); /* dummy td enables safe urb queuing */ - qh->dummy = ehci_qtd_alloc (ehci, flags); + qh->dummy = ehci_qtd_alloc(ehci, flags); if (qh->dummy == NULL) { ehci_dbg (ehci, "no dummy td\n"); goto fail1; @@ -117,7 +117,7 @@ static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags) * This is the initialisation and cleanup code. */ -static void ehci_mem_cleanup (struct ehci_hcd *ehci) +static void ehci_mem_cleanup(struct ehci_hcd *ehci) { if (ehci->async) qh_destroy(ehci, ehci->async); @@ -138,7 +138,7 @@ static void ehci_mem_cleanup (struct ehci_hcd *ehci) ehci->sitd_pool = NULL; if (ehci->periodic) - dma_free_coherent (ehci_to_hcd(ehci)->self.controller, + dma_free_coherent(ehci_to_hcd(ehci)->self.sysdev, ehci->periodic_size * sizeof (u32), ehci->periodic, ehci->periodic_dma); ehci->periodic = NULL; @@ -154,8 +154,8 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) int i; /* QTDs for control/bulk/intr transfers */ - ehci->qtd_pool = dma_pool_create ("ehci_qtd", - ehci_to_hcd(ehci)->self.controller, + ehci->qtd_pool = dma_pool_create("ehci_qtd", + ehci_to_hcd(ehci)->self.sysdev, sizeof (struct ehci_qtd), 32 /* byte alignment (for hw parts) */, 4096 /* can't cross 4K */); @@ -164,22 +164,22 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) } /* QHs for control/bulk/intr transfers */ - ehci->qh_pool = dma_pool_create ("ehci_qh", - ehci_to_hcd(ehci)->self.controller, + ehci->qh_pool = dma_pool_create("ehci_qh", + ehci_to_hcd(ehci)->self.sysdev, sizeof(struct ehci_qh_hw), 32 /* byte alignment (for hw parts) */, 4096 /* can't cross 4K */); if (!ehci->qh_pool) { goto fail; } - ehci->async = ehci_qh_alloc (ehci, flags); + ehci->async = ehci_qh_alloc(ehci, flags); if (!ehci->async) { goto fail; } /* ITD for high speed ISO transfers */ - ehci->itd_pool = dma_pool_create ("ehci_itd", - ehci_to_hcd(ehci)->self.controller, + ehci->itd_pool = dma_pool_create("ehci_itd", + ehci_to_hcd(ehci)->self.sysdev, sizeof (struct ehci_itd), 32 /* byte alignment (for hw parts) */, 4096 /* can't cross 4K */); @@ -188,8 +188,8 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) } /* SITD for full/low speed split ISO transfers */ - ehci->sitd_pool = dma_pool_create ("ehci_sitd", - ehci_to_hcd(ehci)->self.controller, + ehci->sitd_pool = dma_pool_create("ehci_sitd", + ehci_to_hcd(ehci)->self.sysdev, sizeof (struct ehci_sitd), 32 /* byte alignment (for hw parts) */, 4096 /* can't cross 4K */); @@ -199,7 +199,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) /* Hardware periodic table */ ehci->periodic = (__le32 *) - dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller, + dma_alloc_coherent(ehci_to_hcd(ehci)->self.sysdev, ehci->periodic_size * sizeof(__le32), &ehci->periodic_dma, flags); if (ehci->periodic == NULL) {