From patchwork Wed Mar 1 19:19:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yury Norov X-Patchwork-Id: 9599007 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1827160453 for ; Wed, 1 Mar 2017 19:24:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 00EAA28558 for ; Wed, 1 Mar 2017 19:24:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E64322854E; Wed, 1 Mar 2017 19:24:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAD_ENC_HEADER,BAYES_00, DKIM_SIGNED,DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C4DE42854E for ; Wed, 1 Mar 2017 19:24:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=awQ8YE5zVcx6cAwwDNdcv+z9MYLoPjkoZjXeGSlWwuw=; b=pAaBz/wWR8TGrC muXK1bvIEB1WZMcoMc17a2LKGoKgFBny+1L9/SaonkxbsrOs6Z+ztSiUzFEz+wrPv/8AjMgHcgzgp wtKWT5dkR33BOTBJr8QfZBoOSKvDInFdy0A494FGMnommDaLoXC+zqPO2TuJtp+aiCLR1ulAg4Qx2 HIh7FapFujx3kcI7kPFlQnEOq3lIqxH9K3Khed6iKCoyCyG1eU3vcZldANOlYzGiL44BZJdTqgi90 vxwPl9qsEm4PTpk+riEZI+N3TV1f0LLHmBnFTGHNkGsTod/ET8/WnJ6PMM9dLhfQstOazoa9nUqkt wn363VuePNTsEFKxaFTg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cj9rH-0004tX-66; Wed, 01 Mar 2017 19:24:19 +0000 Received: from merlin.infradead.org ([2001:4978:20e::2]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cj9ou-0001zS-9O for linux-arm-kernel@bombadil.infradead.org; Wed, 01 Mar 2017 19:21:52 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Content-Type:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=IavqLRW6C+jN/3Fky2/H9fkizxN06YYfKq9JmbbsAPg=; b=21IW2o0b/31gD/7dQubTuu8Ym U2NgZ2/dKuJ2DUfatDCVBANBgdhIFzrgcE/q9WFKkhsWKDMIfEi3ovF5Q7MQE+RfBTPzgOhJ/WTqV IdkXONxrTEdBFpzoyZnl3OhiiACOfNi5KX81+cAYUVwBsomWVF6S+44UQZSWlbwzCQ2WMueUT85Oc EIhH3JGjK2oCXqHaD1xUdFlfi3URJUXUq2v+QYh9yTWlFhd/sTs4P2KOb8YxI1jymD8FmWd6zrVKO rXBXpEK2jh+EuJS1ZBdEL1q0vbi2u+DWVRFzxBUmxUwSrbSmJwHRHA+v58n7Rnuq5tlycq3Yrxn5a o+fC+VSEg==; Received: from mail-co1nam03on0082.outbound.protection.outlook.com ([104.47.40.82] helo=NAM03-CO1-obe.outbound.protection.outlook.com) by merlin.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cj9or-0002ar-3t for linux-arm-kernel@lists.infradead.org; Wed, 01 Mar 2017 19:21:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-caviumnetworks-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=IavqLRW6C+jN/3Fky2/H9fkizxN06YYfKq9JmbbsAPg=; b=VLgPsM3j+bnQJTlEy2bJHG0DflRH0ZhtSdZL4tilgvsA04qjurKRPAX6OIAw+FttUeEqXZplnfxcpmcXZwOSP5urnv3s4Izv4g64DPuFHaCOY/R3RUgjvw5CsK1dZEaNdgqIpkY55XNJB51SnMnTeovh1b8b+TPiGw93pj7pv4Q= Authentication-Results: lists.infradead.org; dkim=none (message not signed) header.d=none; lists.infradead.org; dmarc=none action=none header.from=caviumnetworks.com; Received: from localhost (27.97.135.110) by DM3PR07MB2249.namprd07.prod.outlook.com (10.164.33.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.919.13; Wed, 1 Mar 2017 19:21:25 +0000 From: Yury Norov To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Arnd Bergmann , Catalin Marinas Subject: [PATCH 09/20] arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat) Date: Thu, 2 Mar 2017 00:49:17 +0530 Message-Id: <1488395968-14313-10-git-send-email-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488395968-14313-1-git-send-email-ynorov@caviumnetworks.com> References: <1488395968-14313-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 X-Originating-IP: [27.97.135.110] X-ClientProxiedBy: HE1PR0802CA0009.eurprd08.prod.outlook.com (10.172.123.147) To DM3PR07MB2249.namprd07.prod.outlook.com (10.164.33.147) X-MS-Office365-Filtering-Correlation-Id: c1c3ff59-6f6a-4379-5051-08d460d82819 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001); SRVR:DM3PR07MB2249; X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2249; 3:Chy1apVqV1PU0OkE7k0k5d3w5btsnrQqDux3uxG2vqA6FLSaso4gKOw9H3N9wrGtnEOjSu40q1Q6FQV8sL6OIBSRLPlVWz18EsrfMu4faIKW8zcydVbhDdowKaoOcY+gPkG9Kkt7HLOLSV/CBDm54hMOWoPzMLp8F7KG55Wycbicw7u41N/t119xKbdrpXKYCYYDwWSH0DbfH0a8prMNu8KJu+L7OWRn4VtCjQuJArQqBEKFAlbzO7FQQC/E3g9ioviM3GnYQK77XVN2GWdzPA==; 25:/t9w6fpaf5gI3xNirQFU29PiEbB4rwGfo5Gv+zssVHItcy6dHk4KL4z3hqkY8xi5Ts0R91cNsF1kMJe23XlZux1YoXr8kgGLPM9B5yqTKHMZDWR2pcqLkXdNMx/hjVDvLXpZUxadn6ci4arkVc20662ni7ncEBfcx6++IGVfE9Q8D2l7ugJltYeONdl5u6Gt108hqtFC2RonG+77LITYRoaqZumzWw/GLkVC8tw3mz6SNu9ZreemQ9pFkabL4XqDj9lFswWN6eCohVq1SRAq3eh84WEBmZBePm9UhlCxrjgRuGVOWr0GYNt/12DwJMWz2MBLwALk1NVpPTAhOCnEKJEOnWKQkD6KNqU9StWabqSwYu0s8ENLBLCvPekq/ndz5Gq+rifz9WJySG0aIlCanRn+PZvE8TKVxIxn/ymGNB2TodO4GtYZCzSHMs4lhvMGpwAbVCLgUxikeE53JTwmJQ== X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2249; 31:clfVL4ZcWoS//YDxlm+wcYMZJbdjHHlyzimNTWqyPqH1W7SZGsray+q/3wu0yA5+qHEP/dTr7TTo4RmwTsx/oS48Vaw366+AeA7723iDq1NZWRPTS8PFjMRQysShWzCo480IB3zilFuiIEwCLHX1LZVeDYr5A4K+Jc8c/kpS6XidZQHpDQfbKnxGLNp8Jb2M//BQA1XTRJLFRpQnFrMNGpQbb344rr2mi5ftayMn1wo=; 20:p60Iyv5wOcFLdgIEFEoUfXphMemEexM+Mgn+d4NgCi/YDyiCFaHyK6PIFvvc0f33N9VFAuDEDJ7F5Hdg/L7OYnmvpt32IRMGs1wB1cO/oW4/3RgIFRSWZE9O/gsuxq1UqOez1WljouiCJifo8T4/0kbHgJr0k7QdmeVmTI0lga57N1Zhtv0V8a2MQ4f9+lRZ7ZV6lRGny7k3qszZFjkj6CO82pU5zJ1PrTo+ve7FktNTiP8/eFVDfad7zAPIl1jG9axzwmfFDZ86Wjd21jUjFTReTkZrFWB1fEcnp8PgdpjcYqvsbOdr1I2yhdi9nN0Je910p+wQ4QrTF70/woFS9tSwnt0brwS+iqgZbQ7xahmMbWJQEKazQ4CHRykQJC/cK4kScPpvvYczh8TNaJfulK/uElBDbi4KmW4zTqBe79c8FzAoI3AKlqGACoTrtuizTlPWuNgIOfiRDEsKsuqdeMSGD//Z1uyxoYKhmj5GnG+0Lf9ymbBJVdild8U/1idnpiO/Gq6HhCH+aiRCg69Zzh2PWkD8iMlJ8dHL0CryPhzHP1qfjdr8/fhBI8FfD0ggNNmCpIo8lek4BYw1gaCFaeM6TgEQXug1FFotsbtyuhg= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(250305191791016)(22074186197030); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(6040375)(601004)(2401047)(8121501046)(5005006)(3002001)(10201501046)(6041248)(20161123555025)(20161123564025)(20161123558025)(20161123562025)(20161123560025)(6072148); SRVR:DM3PR07MB2249; BCL:0; PCL:0; RULEID:; SRVR:DM3PR07MB2249; X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2249; 4:SXMQnnP/FITPNlVSGZ6VBckKVlNhvzvr8PQ1YAHGgv7K3pdHMunKRiiBk22E06VwaKnbxF2FL/dqgIn4fKY5OuAvkJuQA3o7roOPVKTjNdJKtKtXkuPmae/Y1cHhR6d99XpiE0fDevztCxZzjlHPmG3qiokJB3jc6dNox/v3hyZjr0Ecb1qtJ5znjIq8/7228UK56LTyPM0u1BXDO0vjl9x0ja5pF4ihxDGWMpMjcc+2hhNGk9xN845seI5z3ZPfhzSavJceWIMvxchgGKfCJdsdBakUscDVXTfR16LaQKwusRH8AMhq2TxPc6PTyjN9lhsdxdi3ptM+mtb1YNmMT0gObXDZCBaxOsZjQiHeHGpcGdTM3djrn8NRnJ96Rp2r+kfobHWrky1yvEsjgYtC4wtHn8BUI6rdKdBpS66xmbXEXrs5/ZPenQ7GxDrksha0OCDMgOuDntpcZrQDtbqI+LFloJeyHfpbfjKjKYa4sAc1UWPs0MsoNZdQvbEzk2XggOrc73RmVRy6R5y5X/BN7NvBw0SztBxDQaZsohgh4nKFwSCaQ+LoOCJ82av7eRq9FNiF6ks5DmU9zGfVYz66g1GX80PAlVGhebY2U9zd0jPWKpElqJ+pLDW1DSoZ+3BjREuOEZY9kYusekymPrs0nBZ0immStdEGsthXQZIS5cGxy8lT1ZWXAYvFPqECZXUk X-Forefront-PRVS: 0233768B38 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(4630300001)(6069001)(6009001)(7916002)(39450400003)(76506005)(92566002)(50226002)(6496005)(7416002)(54906002)(5660300001)(8676002)(5009440100003)(7736002)(4326008)(81166006)(305945005)(6486002)(66066001)(189998001)(76176999)(48376002)(5003940100001)(42186005)(2906002)(6666003)(2950100002)(6116002)(50466002)(50986999)(36756003)(47776003)(3846002)(33646002)(6306002)(53936002)(25786008)(38730400002); DIR:OUT; SFP:1101; SCL:1; SRVR:DM3PR07MB2249; H:localhost; FPR:; SPF:None; MLV:sfv; LANG:en; X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; DM3PR07MB2249; 23:v1i/Zbc4J7jiUEqijqZ6bRHNirJfunCryIsl6V2Ay?= =?us-ascii?Q?RbusFYni3nnJ5+f6Tw7Z7VmnktAXkK+wt/NvMKyvnhOZpB289hk/2mEx+ZZo?= =?us-ascii?Q?AP6Reyhg/LrCXoclngq4cSEMdwNqT6qg0TzbWjXzkF/KsN20T9dLwbSGOs/A?= =?us-ascii?Q?kdAMNSq3dXoSt4xZ86A3XXFb52xXwj29IpPT4ecdCeG2Uip6n4w8WNbVNjCi?= =?us-ascii?Q?WW99WEGMrcHOhjrbA4gY0TIc2emzMAA8Ov8FvIS8whlUH1wnvS4zDjGCt4Qg?= =?us-ascii?Q?p+gZhRP+5Klmvm1FsZM8+PP3Op/EhiMoOFnkb5ymTzgu4LEEL5qXIBlWsygj?= =?us-ascii?Q?vwkTWpXIp277UV2zsvFPifgj65xQ3W7t/t01Sa5hh8qPpGn0n5eq1KfNFyce?= =?us-ascii?Q?yc7tFT4n7IIz/tgFIlOj8JqWZ+trssFZ8VxQsrW8Hd+9O2oruaibiCcKq7+Q?= =?us-ascii?Q?Q4YrYLbV8xIG1jXSzGJx6r/Q6xo1SjOItzm8uvLEmRh2qR2/d0ZsV4JDT5t0?= =?us-ascii?Q?dmM4nj5jgA8yG/0+iNwxe+9gBMFbcdtsQTX1VgEYqdXxvD5LaQLteFTDwGmc?= =?us-ascii?Q?jOqwsqwMh57WC6iPkYwgtDAj/j4o6/bwK41W57U10M5FRihv2nhcpZFHqZDw?= =?us-ascii?Q?CRnNQh4QgkJcFCavrJLC0Fc7F6tBWnyr7DKwglxTkOLFHv+0+orTp61ZnIsK?= =?us-ascii?Q?0hiY5UIV/2f9c6SQ8+VHrTbSqvd1GF0ezC5TouMy05lcKTXcgg9GTl5/YyZ7?= =?us-ascii?Q?JKSXOps8S99ZmriLi9l8Fx0swSliRXARRQZuRaYy5DCEuCoZ0ohQ60PFs6s5?= =?us-ascii?Q?yH7riGi7sz42ZCLrLT+8YAz15DmXgnzJ05XszWGV0WeeL2L+A5VTtKwzxjmb?= =?us-ascii?Q?DyeGVNx2j0tKaGstDQDKR2ENAQUHgL8jf47147EivknOqptaP+Fc92LTwqsd?= =?us-ascii?Q?Oe3SJScu7W+2nccbCAKz4Siz6N3eJe2iJnSci8ke0DOIDM2xZkyrXqloRPA5?= =?us-ascii?Q?6w=3D?= X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2249; 6:5F0WHUZWBiyJMFWc5IY+VApIWKfp8onwSxzM1HH1jxJ/0NFDBROZKdfXYpXmukKADcdyH1zLhnUkuPfk+6GZnjzoPzLjkSIIcgegzPLeHgYm/P6xDafW0+X3nfWx6WqRtTGPrStcZjoX4CzyfwgI9g67SUpA3GpTOfI7RUJYzSLlBQhKaD5X8V+Mvi+rfUEl9kBpHTtT2+edW9xJu4R6sMsjig21axfcFAocPJaBy3UejamEtTsv7yXLvGH4ZIgnWt+UUIXpjGKM8lY0q3bGcopTz3rdZX/TMOunBETUD49M1njJpWDcAbqdZ3j45ZEeULy5MrujfP3ry7y+Rgpr003vBI6Fj9JlzRCeEBwVahYj4yLOCr9VrOYaXVEiJ/hgvsJFvkVs1nIKVVrckchYUQ==; 5:H22tcABf3HZ/Eb3skim6rEzv7hcCB7dqhVGF7mLWALU84pg/ZoY+2pmjAwAf+4EsRZX9jDN+Iw5WsTvmFxOlwGASJhrSkP6uHUdW00Km33mSqge44MsIsHZ7Wh6EifTc3T/Q/Zx+JrYCd9rhBUITqVzdvT6L6VGFqkSr459BgDE=; 24:tyVZnnUpi1SpjPvCHhbj7b3GwVp8eQOhP4+6n7MTtX+QY4gcpzpR07NdeXUzEocrLcE8I1KDFzRkd8Dm5JNwdySYEmFLUYFK18w5ooBbu+I= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; DM3PR07MB2249; 7:K2DsetEmFlxJocyFdWyoXKkZ6ahzgjoDC6KBuVv8BhQDFcMVF93WdxiDhlRVzOphz/JAUlOddUrFXGQdP2SFPWHV2RDWN0QjHGjQ8Soo2LOveu1YYkhs0nrjv0StnohvsvmB20YgX2mEDv28L0JLC1j0+X9vyNMCqUQjGI+W9EmrEHV/1vBC12gFkQMfCuUj+XSyHHXen3HqkfKloH6W7AuyzC3Z8XEb38hUpALzEDAEZ/ltdBGXrLv51yAi5pn9vM+Fpj7tPZ0VBNgFEL81l9WCMqrmZMXT3g9oIQ+a3LLghB5ulq8VcJpxc6ASxkLvv1LtpKy2/DxhVWSwqOdfGQ== X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Mar 2017 19:21:25.7103 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR07MB2249 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170301_142149_430774_74AE8298 X-CRM114-Status: GOOD ( 23.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Pinski , Heiko Carstens , Chris Metcalf , Yury Norov , philipp.tomsich@theobroma-systems.com, Joseph Myers , zhouchengming1@huawei.com, Steve Ellcey , Prasun.Kapoor@caviumnetworks.com, Andreas Schwab , agraf@suse.de, szabolcs.nagy@arm.com, geert@linux-m68k.org, Adam Borowski , manuel.montezelo@gmail.com, Chris Metcalf , Andrew Pinski , linyongting@huawei.com, klimov.linux@gmail.com, broonie@kernel.org, Bamvor Zhangjian , Bamvor Jian Zhang , Maxim Kuvyrkov , Florian Weimer , Nathan_Lynch@mentor.com, Ramana Radhakrishnan , schwidefsky@de.ibm.com, davem@davemloft.net, christoph.muellner@theobroma-systems.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Based on patch of Andrew Pinski. This patch introduces is_a32_compat_task and is_a32_thread so it is easier to say this is a a32 specific thread or a generic compat thread/task. Corresponding functions are located in to avoid mess in headers. Some files include both and , and this is wrong because has already included. It was fixed too. Signed-off-by: Yury Norov Signed-off-by: Andrew Pinski Signed-off-by: Bamvor Jian Zhang --- arch/arm64/include/asm/compat.h | 19 ++--------- arch/arm64/include/asm/elf.h | 10 +++--- arch/arm64/include/asm/ftrace.h | 2 +- arch/arm64/include/asm/is_compat.h | 64 ++++++++++++++++++++++++++++++++++++ arch/arm64/include/asm/memory.h | 5 +-- arch/arm64/include/asm/processor.h | 5 +-- arch/arm64/include/asm/syscall.h | 2 +- arch/arm64/include/asm/thread_info.h | 2 +- arch/arm64/kernel/hw_breakpoint.c | 8 ++--- arch/arm64/kernel/perf_regs.c | 2 +- arch/arm64/kernel/process.c | 7 ++-- arch/arm64/kernel/ptrace.c | 11 +++---- arch/arm64/kernel/signal.c | 4 +-- arch/arm64/kernel/traps.c | 3 +- 14 files changed, 97 insertions(+), 47 deletions(-) create mode 100644 arch/arm64/include/asm/is_compat.h diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h index eb8432b..df2f72d 100644 --- a/arch/arm64/include/asm/compat.h +++ b/arch/arm64/include/asm/compat.h @@ -24,6 +24,8 @@ #include #include +#include + #define COMPAT_USER_HZ 100 #ifdef __AARCH64EB__ #define COMPAT_UTS_MACHINE "armv8b\0\0" @@ -298,23 +300,6 @@ struct compat_shmid64_ds { compat_ulong_t __unused5; }; -static inline int is_compat_task(void) -{ - return test_thread_flag(TIF_32BIT); -} - -static inline int is_compat_thread(struct thread_info *thread) -{ - return test_ti_thread_flag(thread, TIF_32BIT); -} - -#else /* !CONFIG_COMPAT */ - -static inline int is_compat_thread(struct thread_info *thread) -{ - return 0; -} - #endif /* CONFIG_COMPAT */ #endif /* __KERNEL__ */ #endif /* __ASM_COMPAT_H */ diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index 5d17004..192d295 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -16,6 +16,10 @@ #ifndef __ASM_ELF_H #define __ASM_ELF_H +#ifndef __ASSEMBLY__ +#include +#endif + #include /* @@ -157,13 +161,9 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp); /* 1GB of VA */ -#ifdef CONFIG_COMPAT -#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \ +#define STACK_RND_MASK (is_compat_task() ? \ 0x7ff >> (PAGE_SHIFT - 12) : \ 0x3ffff >> (PAGE_SHIFT - 12)) -#else -#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12)) -#endif #ifdef __AARCH64EB__ #define COMPAT_ELF_PLATFORM ("v8b") diff --git a/arch/arm64/include/asm/ftrace.h b/arch/arm64/include/asm/ftrace.h index caa955f..0feb28a 100644 --- a/arch/arm64/include/asm/ftrace.h +++ b/arch/arm64/include/asm/ftrace.h @@ -54,7 +54,7 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr) #define ARCH_TRACE_IGNORE_COMPAT_SYSCALLS static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs) { - return is_compat_task(); + return is_a32_compat_task(); } #endif /* ifndef __ASSEMBLY__ */ diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h new file mode 100644 index 0000000..8dba5ca --- /dev/null +++ b/arch/arm64/include/asm/is_compat.h @@ -0,0 +1,64 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __ASM_IS_COMPAT_H +#define __ASM_IS_COMPAT_H +#ifndef __ASSEMBLY__ + +#include + +#ifdef CONFIG_AARCH32_EL0 + +static inline int is_a32_compat_task(void) +{ + return test_thread_flag(TIF_32BIT); +} + +static inline int is_a32_compat_thread(struct thread_info *thread) +{ + return test_ti_thread_flag(thread, TIF_32BIT); +} + +#else + +static inline int is_a32_compat_task(void) + +{ + return 0; +} + +static inline int is_a32_compat_thread(struct thread_info *thread) +{ + return 0; +} + +#endif /* CONFIG_AARCH32_EL0 */ + +#ifdef CONFIG_COMPAT + +static inline int is_compat_task(void) +{ + return is_a32_compat_task(); +} + +#endif /* CONFIG_COMPAT */ + +static inline int is_compat_thread(struct thread_info *thread) +{ + return is_a32_compat_thread(thread); +} + + +#endif /* !__ASSEMBLY__ */ +#endif /* __ASM_IS_COMPAT_H */ diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index 32f827233..9b1835c 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -26,6 +26,7 @@ #include #include #include +#include /* * Allow for constants defined here to be used from assembly code @@ -78,9 +79,9 @@ #ifdef CONFIG_COMPAT #define TASK_SIZE_32 UL(0x100000000) -#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ +#define TASK_SIZE (is_compat_task() ? \ TASK_SIZE_32 : TASK_SIZE_64) -#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \ +#define TASK_SIZE_OF(tsk) (is_compat_thread(tsk) ? \ TASK_SIZE_32 : TASK_SIZE_64) #else #define TASK_SIZE TASK_SIZE_64 diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index f3f3599..cd0199a 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -40,7 +41,7 @@ #define STACK_TOP_MAX TASK_SIZE_64 #ifdef CONFIG_COMPAT #define AARCH32_VECTORS_BASE 0xffff0000 -#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ +#define STACK_TOP (is_compat_task() ? \ AARCH32_VECTORS_BASE : STACK_TOP_MAX) #else #define STACK_TOP STACK_TOP_MAX @@ -92,7 +93,7 @@ struct thread_struct { #define task_user_tls(t) \ ({ \ unsigned long *__tls; \ - if (is_compat_thread(task_thread_info(t))) \ + if (is_a32_compat_thread(task_thread_info(t))) \ __tls = &(t)->thread.tp2_value; \ else \ __tls = &(t)->thread.tp_value; \ diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/syscall.h index 709a574..ce09641 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -113,7 +113,7 @@ static inline void syscall_set_arguments(struct task_struct *task, */ static inline int syscall_get_arch(void) { - if (is_compat_task()) + if (is_a32_compat_task()) return AUDIT_ARCH_ARM; return AUDIT_ARCH_AARCH64; diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index 46c3b93..a7ffea2 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -95,7 +95,7 @@ struct thread_info { #define TIF_FREEZE 19 #define TIF_RESTORE_SIGMASK 20 #define TIF_SINGLESTEP 21 -#define TIF_32BIT 22 /* 32bit process */ +#define TIF_32BIT 22 /* AARCH32 process */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index 0296e79..a548fb4 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -168,7 +168,7 @@ enum hw_breakpoint_ops { HW_BREAKPOINT_RESTORE }; -static int is_compat_bp(struct perf_event *bp) +static int is_a32_compat_bp(struct perf_event *bp) { struct task_struct *tsk = bp->hw.target; @@ -179,7 +179,7 @@ static int is_compat_bp(struct perf_event *bp) * deprecated behaviour if we use unaligned watchpoints in * AArch64 state. */ - return tsk && is_compat_thread(task_thread_info(tsk)); + return tsk && is_a32_compat_thread(task_thread_info(tsk)); } /** @@ -479,7 +479,7 @@ static int arch_build_bp_info(struct perf_event *bp) * Watchpoints can be of length 1, 2, 4 or 8 bytes. */ if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { - if (is_compat_bp(bp)) { + if (is_a32_compat_bp(bp)) { if (info->ctrl.len != ARM_BREAKPOINT_LEN_2 && info->ctrl.len != ARM_BREAKPOINT_LEN_4) return -EINVAL; @@ -536,7 +536,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) * AArch32 tasks expect some simple alignment fixups, so emulate * that here. */ - if (is_compat_bp(bp)) { + if (is_a32_compat_bp(bp)) { if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) alignment_mask = 0x7; else diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c index 3f62b35..a79058f 100644 --- a/arch/arm64/kernel/perf_regs.c +++ b/arch/arm64/kernel/perf_regs.c @@ -45,7 +45,7 @@ int perf_reg_validate(u64 mask) u64 perf_reg_abi(struct task_struct *task) { - if (is_compat_thread(task_thread_info(task))) + if (is_a32_compat_thread(task_thread_info(task))) return PERF_SAMPLE_REGS_ABI_32; else return PERF_SAMPLE_REGS_ABI_64; diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 1ad48f9..e3fe1ac 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -48,7 +48,6 @@ #include #include -#include #include #include #include @@ -215,7 +214,7 @@ static void tls_thread_flush(void) { write_sysreg(0, tpidr_el0); - if (is_compat_task()) { + if (is_a32_compat_task()) { current->thread.tp_value = 0; /* @@ -267,7 +266,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, *task_user_tls(p) = read_sysreg(tpidr_el0); if (stack_start) { - if (is_compat_thread(task_thread_info(p))) + if (is_a32_compat_thread(task_thread_info(p))) childregs->compat_sp = stack_start; else childregs->sp = stack_start; @@ -304,7 +303,7 @@ static void tls_thread_switch(struct task_struct *next) *task_user_tls(current) = tpidr; tpidr = *task_user_tls(next); - tpidrro = is_compat_thread(task_thread_info(next)) ? + tpidrro = is_a32_compat_thread(task_thread_info(next)) ? next->thread.tp_value : 0; write_sysreg(tpidr, tpidr_el0); diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index d924ac4..09e30a9 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -38,7 +38,6 @@ #include #include -#include #include #include #include @@ -186,7 +185,7 @@ static void ptrace_hbptriggered(struct perf_event *bp, #ifdef CONFIG_AARCH32_EL0 int i; - if (!is_compat_task()) + if (!is_a32_compat_task()) goto send_sig; for (i = 0; i < ARM_MAX_BRP; ++i) { @@ -1311,9 +1310,9 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task) * 32-bit children use an extended user_aarch32_ptrace_view to allow * access to the TLS register. */ - if (is_compat_task()) + if (is_a32_compat_task()) return &user_aarch32_view; - else if (is_compat_thread(task_thread_info(task))) + else if (is_a32_compat_thread(task_thread_info(task))) return &user_aarch32_ptrace_view; #endif return &user_aarch64_view; @@ -1340,7 +1339,7 @@ static void tracehook_report_syscall(struct pt_regs *regs, * A scratch register (ip(r12) on AArch32, x7 on AArch64) is * used to denote syscall entry/exit: */ - regno = (is_compat_task() ? 12 : 7); + regno = (is_a32_compat_task() ? 12 : 7); saved_reg = regs->regs[regno]; regs->regs[regno] = dir; @@ -1451,7 +1450,7 @@ int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task) if (!test_tsk_thread_flag(task, TIF_SINGLESTEP)) regs->pstate &= ~DBG_SPSR_SS; - if (is_compat_thread(task_thread_info(task))) + if (is_a32_compat_thread(task_thread_info(task))) return valid_compat_regs(regs); else return valid_native_regs(regs); diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index c7b6de6..5fa1b40 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -276,7 +276,7 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set, static void setup_restart_syscall(struct pt_regs *regs) { - if (is_compat_task()) + if (is_a32_compat_task()) compat_setup_restart_syscall(regs); else regs->regs[8] = __NR_restart_syscall; @@ -295,7 +295,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) /* * Set up the stack frame */ - if (is_compat_task()) { + if (is_a32_compat_task()) { if (ksig->ka.sa.sa_flags & SA_SIGINFO) ret = compat_setup_rt_frame(usig, ksig, oldset, regs); else diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 010c110..eeda105 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include @@ -547,7 +548,7 @@ asmlinkage long do_ni_syscall(struct pt_regs *regs) { #ifdef CONFIG_AARCH32_EL0 long ret; - if (is_compat_task()) { + if (is_a32_compat_task()) { ret = compat_arm_syscall(regs); if (ret != -ENOSYS) return ret;