Message ID | 1488448050-7574-9-git-send-email-yangbo.lu@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BY2FFO11FD026.mail.protection.outlook.com (10.1.15.215) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.933.11 via Frontend Transport; Thu, 2 Mar 2017 10:02:00 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id v22A1OJD007146; Thu, 2 Mar 2017 03:01:56 -0700 From: Yangbo Lu <yangbo.lu@nxp.com> To: <linux-mmc@vger.kernel.org>, <ulf.hansson@linaro.org>, Adrian Hunter <adrian.hunter@intel.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Catalin Marinas <catalin.marinas@arm.com>, "Will Deacon" <will.deacon@arm.com> Subject: [PATCH 8/9] arm64: dts: ls1046a: add clocks property and compatible for eSDHC node Date: Thu, 2 Mar 2017 17:47:29 +0800 Message-ID: <1488448050-7574-9-git-send-email-yangbo.lu@nxp.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1488448050-7574-1-git-send-email-yangbo.lu@nxp.com> References: <1488448050-7574-1-git-send-email-yangbo.lu@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131329225206902863; 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diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 4a164b8..141a513 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -209,10 +209,11 @@ }; esdhc: esdhc@1560000 { - compatible = "fsl,esdhc"; + compatible = "fsl,ls1046a-esdhc", "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <0>; + clocks = <&clockgen 2 1>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; big-endian;
The eSDHC could select peripheral clock or platform clock as clock source. In default, we use platform clock. This patch is to add clocks property describing peripheral clock for eSDHC node. The driver could use common clk APIs to get peripheral clock. Also add a compatible for ls1046a eSDHC node. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)