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Received: from mx1.redhat.com ([209.132.183.28]) by casper.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1ckqvW-0003Jz-FR for linux-arm-kernel@lists.infradead.org; Mon, 06 Mar 2017 11:35:45 +0000 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9713B80F6C; Mon, 6 Mar 2017 11:35:03 +0000 (UTC) Received: from localhost.localdomain.com (ovpn-116-100.ams2.redhat.com [10.36.116.100]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v26BYbnU002618; Mon, 6 Mar 2017 06:34:58 -0500 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, marc.zyngier@arm.com, christoffer.dall@linaro.org, vijayak@caviumnetworks.com, Vijaya.Kumar@cavium.com, peter.maydell@linaro.org, linux-arm-kernel@lists.infradead.org, drjones@redhat.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Subject: [PATCH v3 05/19] KVM: arm64: ITS: Implement vgic_its_has_attr_regs and attr_regs_access Date: Mon, 6 Mar 2017 12:34:20 +0100 Message-Id: <1488800074-21991-6-git-send-email-eric.auger@redhat.com> In-Reply-To: <1488800074-21991-1-git-send-email-eric.auger@redhat.com> References: <1488800074-21991-1-git-send-email-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 06 Mar 2017 11:35:03 +0000 (UTC) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170306_113542_830960_8B7BD35F X-CRM114-Status: GOOD ( 16.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, pbonzini@redhat.com, dgilbert@redhat.com, quintela@redhat.com, Prasun.Kapoor@cavium.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch implements vgic_its_has_attr_regs and vgic_its_attr_regs_access upon the MMIO framework. VGIC ITS KVM device KVM_DEV_ARM_VGIC_GRP_ITS_REGS group becomes functional. At least GITS_CREADR requires to differentiate a guest write action from a user access. As such let's introduce a new uaccess_its_write vgic_register_region callback. Signed-off-by: Eric Auger --- virt/kvm/arm/vgic/vgic-its.c | 74 ++++++++++++++++++++++++++++++++++++------- virt/kvm/arm/vgic/vgic-mmio.h | 9 ++++-- 2 files changed, 69 insertions(+), 14 deletions(-) diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c index 43bb17e..e9c8f9f 100644 --- a/virt/kvm/arm/vgic/vgic-its.c +++ b/virt/kvm/arm/vgic/vgic-its.c @@ -1287,13 +1287,14 @@ static void vgic_mmio_write_its_baser(struct kvm *kvm, *regptr = reg; } -#define REGISTER_ITS_DESC(off, rd, wr, length, acc) \ +#define REGISTER_ITS_DESC(off, rd, wr, uwr, length, acc) \ { \ .reg_offset = off, \ .len = length, \ .access_flags = acc, \ .its_read = rd, \ .its_write = wr, \ + .uaccess_its_write = uwr, \ } static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its, @@ -1304,28 +1305,28 @@ static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its, static struct vgic_register_region its_registers[] = { REGISTER_ITS_DESC(GITS_CTLR, - vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4, + vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, NULL, 4, VGIC_ACCESS_32bit), REGISTER_ITS_DESC(GITS_IIDR, - vgic_mmio_read_its_iidr, its_mmio_write_wi, 4, + vgic_mmio_read_its_iidr, its_mmio_write_wi, NULL, 4, VGIC_ACCESS_32bit), REGISTER_ITS_DESC(GITS_TYPER, - vgic_mmio_read_its_typer, its_mmio_write_wi, 8, + vgic_mmio_read_its_typer, its_mmio_write_wi, NULL, 8, VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), REGISTER_ITS_DESC(GITS_CBASER, - vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8, + vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, NULL, 8, VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), REGISTER_ITS_DESC(GITS_CWRITER, - vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8, - VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), + vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, NULL, + 8, VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), REGISTER_ITS_DESC(GITS_CREADR, - vgic_mmio_read_its_creadr, its_mmio_write_wi, 8, + vgic_mmio_read_its_creadr, its_mmio_write_wi, NULL, 8, VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), REGISTER_ITS_DESC(GITS_BASER, - vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40, + vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, NULL, 0x40, VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), REGISTER_ITS_DESC(GITS_IDREGS_BASE, - vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30, + vgic_mmio_read_its_idregs, its_mmio_write_wi, NULL, 0x30, VGIC_ACCESS_32bit), }; @@ -1448,14 +1449,63 @@ static void vgic_its_destroy(struct kvm_device *kvm_dev) int vgic_its_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr) { - return -ENXIO; + const struct vgic_register_region *region; + struct vgic_io_device iodev = { + .regions = its_registers, + .nr_regions = ARRAY_SIZE(its_registers), + }; + gpa_t offset; + + offset = attr->attr; + + region = vgic_find_mmio_region(iodev.regions, + iodev.nr_regions, + offset); + if (!region) + return -ENXIO; + return 0; } int vgic_its_attr_regs_access(struct kvm_device *dev, struct kvm_device_attr *attr, u64 *reg, bool is_write) { - return -ENXIO; + const struct vgic_register_region *region; + struct vgic_io_device iodev = { + .regions = its_registers, + .nr_regions = ARRAY_SIZE(its_registers), + }; + struct vgic_its *its = dev->private; + gpa_t addr, offset; + unsigned int len; + + if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) + return -ENXIO; + + offset = attr->attr; + if (offset & 0x7) + return -EINVAL; + + addr = its->vgic_its_base + offset; + + region = vgic_find_mmio_region(iodev.regions, + iodev.nr_regions, + offset); + if (!region) + return -ENXIO; + + len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4; + + if (is_write) { + if (region->uaccess_its_write) + region->uaccess_its_write(dev->kvm, its, addr, + len, *reg); + else + region->its_write(dev->kvm, its, addr, len, *reg); + } else { + *reg = region->its_read(dev->kvm, its, addr, len); + } + return 0; } static int vgic_its_has_attr(struct kvm_device *dev, diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h index 055ad42..ad8a585 100644 --- a/virt/kvm/arm/vgic/vgic-mmio.h +++ b/virt/kvm/arm/vgic/vgic-mmio.h @@ -36,8 +36,13 @@ struct vgic_register_region { }; unsigned long (*uaccess_read)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len); - void (*uaccess_write)(struct kvm_vcpu *vcpu, gpa_t addr, - unsigned int len, unsigned long val); + union { + void (*uaccess_write)(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val); + void (*uaccess_its_write)(struct kvm *kvm, struct vgic_its *its, + gpa_t addr, unsigned int len, + unsigned long val); + }; }; extern struct kvm_io_device_ops kvm_io_gic_ops;