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Fri, 24 Mar 2017 09:22:16 -0700 (PDT) Received: from localhost.localdomain ([59.95.76.64]) by smtp.gmail.com with ESMTPSA id t133sm5645519pgc.24.2017.03.24.09.22.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Mar 2017 09:22:15 -0700 (PDT) From: Jagan Teki To: Shawn Guo Subject: [PATCH v2 15/15] ARM: dts: imx6ul-isiot: Add FEC node support Date: Fri, 24 Mar 2017 21:48:50 +0530 Message-Id: <1490372330-5611-16-git-send-email-jagan@openedev.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1490372330-5611-1-git-send-email-jagan@openedev.com> References: <1490372330-5611-1-git-send-email-jagan@openedev.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170324_162238_400150_C9BB95D1 X-CRM114-Status: GOOD ( 11.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Matteo Lisi , linux-kernel@vger.kernel.org, Jagan Teki , Sascha Hauer , Fabio Estevam , Michael Trimarchi , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jagan Teki Add support for fec1 node on Engicam Is.IoT variant boards. Cc: Shawn Guo Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- Changes for v2: - Newly added patch arch/arm/boot/dts/imx6ul-isiot.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/imx6ul-isiot.dtsi b/arch/arm/boot/dts/imx6ul-isiot.dtsi index 9648de9..34a39c7 100644 --- a/arch/arm/boot/dts/imx6ul-isiot.dtsi +++ b/arch/arm/boot/dts/imx6ul-isiot.dtsi @@ -114,6 +114,24 @@ status = "okay"; }; +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + }; +}; + &pwm8 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm8>; @@ -144,6 +162,21 @@ }; &iomuxc { + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x1b0b0 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0