From patchwork Mon Mar 27 09:30:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 9645823 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BAE76602D6 for ; Mon, 27 Mar 2017 09:33:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BFCFE27F81 for ; Mon, 27 Mar 2017 09:33:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B499228236; Mon, 27 Mar 2017 09:33:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4EF8327F81 for ; Mon, 27 Mar 2017 09:33:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=DLeGhfdxDltztr9JgWf87IB81HmSknFqA3mCjSv1/Ec=; b=XH/GaY/Cmm1NCpX1ttfER5BltV MweMNLtjmL5yYgRHtyxKixEUWGAFxwBodDpQ3gmL0vInNeS66ZDUpLoW9mFAbEulzSsKokDN7OEQt AK0wUTbpG64Y4RMnK5XEvgtYsvKZxSeoYiGTMM/UFqH+YXnmLBKhNHMrSVP1q53+O03HgTzcYO54t oFZYgpGTOg0dazgAogHvFQFyEtbNjKKHR2986ovyBt87KmepRwukiZi7//phgypCgaGDrSCtXhJ26 oCNJ48RgFNhD1rHzA4CyJtI4+zCsMyHHZ/uT0TNBXscZiofa8zjFlhRTwf9aRXM6mIZyvdM0Tn2Qe mpHhb2Nw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1csR1K-0008C7-Hj; Mon, 27 Mar 2017 09:33:02 +0000 Received: from mx1.redhat.com ([209.132.183.28]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1csR0M-0006uP-Uq for linux-arm-kernel@lists.infradead.org; Mon, 27 Mar 2017 09:32:05 +0000 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1C48461D0A; Mon, 27 Mar 2017 09:31:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 1C48461D0A Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=eric.auger@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 1C48461D0A Received: from localhost.localdomain.com (ovpn-117-27.ams2.redhat.com [10.36.117.27]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7D8DE17C46; Mon, 27 Mar 2017 09:31:48 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, marc.zyngier@arm.com, christoffer.dall@linaro.org, andre.przywara@arm.com, vijayak@caviumnetworks.com, Vijaya.Kumar@cavium.com, peter.maydell@linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Subject: [PATCH v4 06/22] KVM: arm64: ITS: Implement vgic_its_has_attr_regs and attr_regs_access Date: Mon, 27 Mar 2017 11:30:56 +0200 Message-Id: <1490607072-21610-7-git-send-email-eric.auger@redhat.com> In-Reply-To: <1490607072-21610-1-git-send-email-eric.auger@redhat.com> References: <1490607072-21610-1-git-send-email-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 27 Mar 2017 09:31:52 +0000 (UTC) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170327_023203_141296_9BF8D97E X-CRM114-Status: GOOD ( 17.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Prasun.Kapoor@cavium.com, drjones@redhat.com, quintela@redhat.com, dgilbert@redhat.com, pbonzini@redhat.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch implements vgic_its_has_attr_regs and vgic_its_attr_regs_access upon the MMIO framework. VGIC ITS KVM device KVM_DEV_ARM_VGIC_GRP_ITS_REGS group becomes functional. At least GITS_CREADR requires to differentiate a guest write action from a user access. As such let's introduce a new uaccess_its_write vgic_register_region callback. Signed-off-by: Eric Auger --- v3 -> v4: - remove changes to the REGISTER_ITS_DESC macro. This will be handled in subsequent patch with the introduction of a new REGISTER_ITS_DESC_UACCESS macro - fix IIDR access and add a comment wrt full length access - handle endianness - add kvm lock and vcpus lock --- virt/kvm/arm/vgic/vgic-its.c | 78 +++++++++++++++++++++++++++++++++++++++++-- virt/kvm/arm/vgic/vgic-mmio.h | 9 +++-- 2 files changed, 83 insertions(+), 4 deletions(-) diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c index f687e91..9b9ea86 100644 --- a/virt/kvm/arm/vgic/vgic-its.c +++ b/virt/kvm/arm/vgic/vgic-its.c @@ -1469,14 +1469,88 @@ static void vgic_its_destroy(struct kvm_device *kvm_dev) int vgic_its_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr) { - return -ENXIO; + const struct vgic_register_region *region; + struct vgic_io_device iodev = { + .regions = its_registers, + .nr_regions = ARRAY_SIZE(its_registers), + }; + gpa_t offset = attr->attr; + + region = vgic_find_mmio_region(iodev.regions, + iodev.nr_regions, + offset); + if (!region) + return -ENXIO; + + return 0; } int vgic_its_attr_regs_access(struct kvm_device *dev, struct kvm_device_attr *attr, u64 *reg, bool is_write) { - return -ENXIO; + const struct vgic_register_region *region; + struct vgic_io_device iodev = { + .regions = its_registers, + .nr_regions = ARRAY_SIZE(its_registers), + }; + struct vgic_its *its = dev->private; + gpa_t addr, offset = attr->attr; + unsigned int len; + unsigned long data = 0; + int ret = 0; + + /* + * Among supported registers, only GITS_CTLR (0x0) and GITS_IIDR (0x4) + * are 32 bits. Others are 64 bits. + */ + if ((offset < 0x8 && offset & 0x3) || (offset >= 0x8 && offset & 0x7)) + return -EINVAL; + + mutex_lock(&dev->kvm->lock); + + if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { + ret = -ENXIO; + goto out; + } + + region = vgic_find_mmio_region(iodev.regions, + iodev.nr_regions, + offset); + if (!region) { + ret = -ENXIO; + goto out; + } + + if (!lock_all_vcpus(dev->kvm)) { + ret = -EBUSY; + goto out; + } + + addr = its->vgic_its_base + offset; + + /* + * Only full length register accesses are supported although + * the architecture spec theoretically allows upper/lower 32 + * bits to be accessed independently + */ + len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4; + + if (is_write) { + data = vgic_data_mmio_bus_to_host(reg, len); + if (region->uaccess_its_write) + region->uaccess_its_write(dev->kvm, its, addr, + len, data); + else + region->its_write(dev->kvm, its, addr, len, data); + } else { + data = region->its_read(dev->kvm, its, addr, len); + vgic_data_host_to_mmio_bus(reg, len, data); + } + unlock_all_vcpus(dev->kvm); +out: + mutex_unlock(&dev->kvm->lock); + return ret; } static int vgic_its_has_attr(struct kvm_device *dev, diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h index 6eec91b..becc473 100644 --- a/virt/kvm/arm/vgic/vgic-mmio.h +++ b/virt/kvm/arm/vgic/vgic-mmio.h @@ -36,8 +36,13 @@ struct vgic_register_region { }; unsigned long (*uaccess_read)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len); - void (*uaccess_write)(struct kvm_vcpu *vcpu, gpa_t addr, - unsigned int len, unsigned long val); + union { + void (*uaccess_write)(struct kvm_vcpu *vcpu, gpa_t addr, + unsigned int len, unsigned long val); + void (*uaccess_its_write)(struct kvm *kvm, struct vgic_its *its, + gpa_t addr, unsigned int len, + unsigned long val); + }; }; extern struct kvm_io_device_ops kvm_io_gic_ops;