From patchwork Tue Mar 28 12:21:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjun Guo X-Patchwork-Id: 9648969 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6FABB602C8 for ; Tue, 28 Mar 2017 12:22:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6C16327F4B for ; Tue, 28 Mar 2017 12:22:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6036828338; Tue, 28 Mar 2017 12:22:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B599227F4B for ; Tue, 28 Mar 2017 12:22:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=ycHyTW6FOqtA5f2NjlX1mpdjX6FtEqKReXxCLz9a6+w=; b=RsU PEZeT7Fo+fAmjaz4J2fJPDm8T8ILD06ElK5NlHqTUxqHS6JUpXPQ4ZZlHulCRuXsuHUHkQVn18uRJ 8JZFmHA41xI0m2lJrV9o74NVcIfSDBdRL8hoX4TJFfXwWmuoJfPBU5LY34LPeGGsKfb6Bcr82MEKv 6bX88qReu5IvOv4e6OIDSLUPKz/UBLB6nryUwwz8VCnSsyuwp4cYaCzh9R6xxxGFyq4jieidhqqvE FLWpGOep64jw23GoT7XS0O8u2XTtVykQ3qxIIxJpqSX8NIpEH7tposQxlihh7+e1NrwYjNoiAAGd1 TADX8qJtBwhXJCCxW15+uq9UhtvvNVQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1csq8s-0004fZ-AQ; Tue, 28 Mar 2017 12:22:30 +0000 Received: from mail-pg0-x235.google.com ([2607:f8b0:400e:c05::235]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1csq8g-0004aj-Lg for linux-arm-kernel@lists.infradead.org; Tue, 28 Mar 2017 12:22:27 +0000 Received: by mail-pg0-x235.google.com with SMTP id 81so56719083pgh.2 for ; Tue, 28 Mar 2017 05:21:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=7ETTl5IkaobVvEjznInhCY5J/9jnQ1hagJW8sJu/JNY=; b=TXGg4FK6GP0Ev7b5U6Hpl6wnS7wjGYok2TN0tuhmF4zk+jvSBUsWAEd/uCtyIodzOv AqeWPu5jABdQ7ddRwPXRIajNnAlNUiEpGiSg5AEO1kW72EcT75XB4qnouou2ogkQ4qbD 5TviH5ZfXvvAzjlFgDFQTaEQB8uJuhUKuu8TU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=7ETTl5IkaobVvEjznInhCY5J/9jnQ1hagJW8sJu/JNY=; b=S7aOQmbn6KI49JG86glxgdHsRF1nyLwfHRF9U6h6zCr5EwzVdHH8Ab/zBaYLeC6Xsf drvx7ccO/YrX6IEnlz6DYu5lb0Q/rzkwfrJHIUCpD2gykRl05mzpIpndY5a/XYCYJ1vS i6XBhrJuUZ8HNHuo6bZEXE5XG7dupBHgtENkWN7QTBH7c8/6N/J4Vy4zhBLJn43YXlQY 6LcBOT/aBaKXJEjkKheTmDz6U4isXhPYzCBNjDzzbJiZkymeMc83XSB6z1ccQ8dbEv1T kBe9lWQB4XU9slPMNPwSQIjUuY8zTqbUaW+OKCh9jt7lHG0zho8SiLUddFifuj4N5F0h ZXhQ== X-Gm-Message-State: AFeK/H1Vk4A0q4IWy4tXNe1zVZZiTl5Dl3vFUcb/L4On/q7WwaHdb1xj59sro4kBSRJo9Tdb X-Received: by 10.98.32.72 with SMTP id g69mr2147375pfg.64.1490703717368; Tue, 28 Mar 2017 05:21:57 -0700 (PDT) Received: from localhost ([104.237.91.145]) by smtp.googlemail.com with ESMTPSA id f3sm7297642pga.34.2017.03.28.05.21.55 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Tue, 28 Mar 2017 05:21:56 -0700 (PDT) From: Hanjun Guo To: Marc Zyngier , "Rafael J. Wysocki" , Lorenzo Pieralisi Subject: [Update][PATCH v9.1 15/15] irqchip: mbigen: Add ACPI support Date: Tue, 28 Mar 2017 20:21:05 +0800 Message-Id: <1490703665-4932-1-git-send-email-hanjun.guo@linaro.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170328_052219_110975_D7C60057 X-CRM114-Status: GOOD ( 21.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kefeng Wang , yimin@huawei.com, linux-kernel@vger.kernel.org, linuxarm@huawei.com, huxinwei@huawei.com, linux-acpi@vger.kernel.org, Hanjun Guo , Darren Hart , Thomas Gleixner , Al Stone , linux-arm-kernel@lists.infradead.org, MaJun MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP With the preparation of platform msi support and interrupt producer in commit d44fa3d46079 ("ACPI: Add support for ResourceSource/IRQ domain mapping"), we can add mbigen ACPI support now. Now that the major framework changes are ready, we just need to add the ACPI probe code which creates the irqdomain for devices connecting to it. In order to create the irqdomain, we need to know the number of hw irqs as input which is provided by mbigen. In DT case, we are using "num-pins" property to describe it, and we will take advantage of that too using _DSD in ACPI as there is no standard way of describe it in ACPI way, also according to the _DSD rule described in Documentation/acpi/DSD-properties-rules.txt, it doesn't break the rules. The DSDT is represented as below: For mbigen, Device(MBI0) { Name(_HID, "HISI0152") Name(_UID, Zero) Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadWrite, 0xa0080000, 0x10000) }) Name(_DSD, Package () { ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () {"num-pins", 378} } }) } For devices, Device(SAS0) { Name(_HID, "HISIxxxx") Name(_UID, Zero) Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadWrite, 0xb0030000, 0x10000) Interrupt(ResourceConsumer,..., "\_SB.MBI0") {12, ...} }) } So for the devices connected to the mbigen, as we clearly say that it refers to a specific interrupt controller (mbigen), we can get the virq from mbigen's irqdomain once it's created successfully. Signed-off-by: Hanjun Guo Signed-off-by: MaJun Cc: Al Stone Cc: Darren Hart Cc: Lorenzo Pieralisi Cc: Marc Zyngier Tested-by: MaJun Tested-by: Wei Xu Reviewed-by: Al Stone --- drivers/irqchip/irq-mbigen.c | 75 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 72 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c index 3756408..061cdb8 100644 --- a/drivers/irqchip/irq-mbigen.c +++ b/drivers/irqchip/irq-mbigen.c @@ -16,6 +16,7 @@ * along with this program. If not, see . */ +#include #include #include #include @@ -180,7 +181,7 @@ static int mbigen_domain_translate(struct irq_domain *d, unsigned long *hwirq, unsigned int *type) { - if (is_of_node(fwspec->fwnode)) { + if (is_of_node(fwspec->fwnode) || is_acpi_device_node(fwspec->fwnode)) { if (fwspec->param_count != 2) return -EINVAL; @@ -271,6 +272,58 @@ static int mbigen_of_create_domain(struct platform_device *pdev, return 0; } +#ifdef CONFIG_ACPI +static int mbigen_acpi_create_domain(struct platform_device *pdev, + struct mbigen_device *mgn_chip) +{ + struct irq_domain *domain; + u32 num_pins = 0; + int ret; + + /* + * "num-pins" is the total number of interrupt pins implemented in + * this mbigen instance, and mbigen is an interrupt controller + * connected to ITS converting wired interrupts into MSI, so we + * use "num-pins" to alloc MSI vectors which are needed by client + * devices connected to it. + * + * Here is the DSDT device node used for mbigen in firmware: + * Device(MBI0) { + * Name(_HID, "HISI0152") + * Name(_UID, Zero) + * Name(_CRS, ResourceTemplate() { + * Memory32Fixed(ReadWrite, 0xa0080000, 0x10000) + * }) + * + * Name(_DSD, Package () { + * ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + * Package () { + * Package () {"num-pins", 378} + * } + * }) + * } + */ + ret = device_property_read_u32(&pdev->dev, "num-pins", &num_pins); + if (ret || num_pins == 0) + return -EINVAL; + + domain = platform_msi_create_device_domain(&pdev->dev, num_pins, + mbigen_write_msg, + &mbigen_domain_ops, + mgn_chip); + if (!domain) + return -ENOMEM; + + return 0; +} +#else +static inline int mbigen_acpi_create_domain(struct platform_device *pdev, + struct mbigen_device *mgn_chip) +{ + return -ENODEV; +} +#endif + static int mbigen_device_probe(struct platform_device *pdev) { struct mbigen_device *mgn_chip; @@ -289,9 +342,18 @@ static int mbigen_device_probe(struct platform_device *pdev) if (IS_ERR(mgn_chip->base)) return PTR_ERR(mgn_chip->base); - err = mbigen_of_create_domain(pdev, mgn_chip); - if (err) + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) + err = mbigen_of_create_domain(pdev, mgn_chip); + else if (ACPI_COMPANION(&pdev->dev)) + err = mbigen_acpi_create_domain(pdev, mgn_chip); + else + err = -EINVAL; + + if (err) { + dev_err(&pdev->dev, "Failed to create mbi-gen@%p irqdomain", + mgn_chip->base); return err; + } platform_set_drvdata(pdev, mgn_chip); return 0; @@ -303,10 +365,17 @@ static int mbigen_device_probe(struct platform_device *pdev) }; MODULE_DEVICE_TABLE(of, mbigen_of_match); +static const struct acpi_device_id mbigen_acpi_match[] = { + { "HISI0152", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, mbigen_acpi_match); + static struct platform_driver mbigen_platform_driver = { .driver = { .name = "Hisilicon MBIGEN-V2", .of_match_table = mbigen_of_match, + .acpi_match_table = ACPI_PTR(mbigen_acpi_match), }, .probe = mbigen_device_probe, };