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Thu, 30 Mar 2017 13:14:34 +0000 (GMT) X-AuditID: b6c32a36-f79446d000002bcd-ba-58dd04ba3d5e Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 32.9B.05715.9B40DD85; Thu, 30 Mar 2017 22:14:34 +0900 (KST) Received: from pankaj.com ([107.108.83.125]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0ONM009R0Q3AAC60@mmp2.samsung.com>; Thu, 30 Mar 2017 22:14:33 +0900 (KST) From: Pankaj Dubey To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v9 07/12] ARM: EXYNOS: introduce soc specific pm ops Date: Thu, 30 Mar 2017 18:47:01 +0530 Message-id: <1490879826-16754-8-git-send-email-pankaj.dubey@samsung.com> X-Mailer: git-send-email 2.7.4 In-reply-to: <1490879826-16754-1-git-send-email-pankaj.dubey@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrFIsWRmVeSWpSXmKPExsWy7bCmnu4ulrsRBjv/S1vcWneO1eLvpGPs Fs+Oalu8ebuGyaL/8Wtmi/PnN7BbbHp8jdVixvl9TBYvj/xgtFh75C67xaKtX9gduD1+/5rE 6HHrTr3Hzll32T02repk89i8pN5jSz+Q17dlFaPH501yARxRXDYpqTmZZalF+nYJXBkr3+1g LtirXDH9+0+WBsbVsl2MHBwSAiYSl1t0uhg5gUwxiQv31rN1MXJxCAnsYJSYdOIXM4TTziSx du0vRogqE4n9Hz6xQyTmMEq03JjECOG8Y5Romv2RGaSKTUBX4sn7uWC2iIC3xOQzf8E6mAWu MUos7F4BlhAWcJHYNf0UG4jNIqAqsa1xCivITbwCHhJTZ+dDbJOTuHmuE6ycU8BT4uSjaWD3 SQgsY5f48+QsM8QPshKbDjBD1LtIPHx+AsoWlnh1fAs7hC0tserfLSaI3m5GiVnTr7JBJNYz Slz4nQRh20scuDKHBcRmFuCTePe1hxViPq9ER5sQhOkhMfObK0S1o8TERYeY4AFxYv4sxgmM MgsYGVYxiqUWFOempxYbFhjpFSfmFpfmpesl5+duYgSnAC2zHYyLzvkcYhTgYFTi4a1YeztC iDWxrLgy9xCjBAezkgjvQqa7EUK8KYmVValF+fFFpTmpxYcYpTlYlMR5RddfixASSE8sSc1O TS1ILYLJMnFwSjUwrohSbPR0rUjw7VB+M33LsjBT78wFX8LfP1osHuap16lVqMB0+azxfMtl 9rsTp24q3TNX9uz533PyCiJKc/PmsQub7tvBIXF55/n6t0euG9mcC+E8U8J3w2Sr4QWNK/MW 5U1SDm6uDUjR/LLyp/ehNVpMdZyzl11yfLr5X1rfmuSMlEoWTp4DSizFGYmGWsxFxYkAWEHR BP0CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupmkeLIzCtJLcpLzFFi42I5/e+xoO4ulrsRBq3nWC1urQMSfycdY7d4 dlTb4s3bNUwW/Y9fM1ucP7+B3WLT42usFjPO72OyeHnkB6PF2iN32S0Wbf3C7sDt8fvXJEaP W3fqPXbOusvusWlVJ5vH5iX1Hlv6gby+LasYPT5vkgvgiHKzyUhNTEktUkjNS85PycxLt1UK DXHTtVBSyEvMTbVVitD1DQlSUihLzCkF8owM0ICDc4B7sJK+XYJbxsp3O5gL9ipXTP/+k6WB cbVsFyMnh4SAicT+D5/YIWwxiQv31rN1MXJxCAnMYpS40djPApIQEnjHKPHtdhKIzSagK/Hk /VxmEFtEwFti8pm/YM3MAlcYJY5OzQSxhQVcJHZNP8UGYrMIqEpsa5zC2sXIwcEr4CExdXY+ xC45iZvnOsHGcAp4Spx8NI0NYpWHxPKTxxgnMPIuYGRYxSiRWpBcUJyUnmuYl1quV5yYW1ya l66XnJ+7iREcEc+kdjAe3OV+iFGAg1GJh7di7e0IIdbEsuLK3EOMEhzMSiK8C5nuRgjxpiRW VqUW5ccXleakFh9iNAW6ayKzlGhyPjBa80riDU3MTcyNDSzMLS1NjJTEeRtnPwsXEkhPLEnN Tk0tSC2C6WPi4JRqYNyxnZNbUuh6n/l1zZSq4kQW98rHUzUnyO1qv7B90ZWKLwfq1ZZH6lw+ o+yW+3JtnovWMa7WiBP5jLO3nLcRWh98eftT5iUPL522OF+nu8KU27LG0dJKu+eo+fzj4ts2 lccI6LFUW132WO/mfmYbe8zyTx/tDgUs8l1+f46c2HOb9MlnUpoX+ymxFGckGmoxFxUnAgAK aQtongIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170330131434epcas1p4e42fe06bae3456c39e0f93a2f8ae4bc0 X-Msg-Generator: CA X-Sender-IP: 203.254.230.26 X-Local-Sender: =?UTF-8?B?7YyQ7Lm07KaIG1NTSVItVHVybiBLZXkgU29sdXRpb25zGw==?= =?UTF-8?B?7IK87ISx7KCE7J6QGy4vU2VuaW9yIENoaWVmIEVuZ2luZWVy?= X-Global-Sender: =?UTF-8?B?UEFOS0FKIEtVTUFSIERVQkVZG1NTSVItVHVybiBLZXkgU29s?= =?UTF-8?B?dXRpb25zG1NhbXN1bmcgRWxlY3Ryb25pY3MbLi9TZW5pb3IgQ2hpZWYgRW5n?= =?UTF-8?B?aW5lZXI=?= X-Sender-Code: =?UTF-8?B?QzEwG1NXQUhRG0MxMElEMDdJRDAxMDk5Nw==?= CMS-TYPE: 101P X-CMS-RootMailID: 20170330131434epcas1p4e42fe06bae3456c39e0f93a2f8ae4bc0 X-RootMTR: 20170330131434epcas1p4e42fe06bae3456c39e0f93a2f8ae4bc0 References: <1490879826-16754-1-git-send-email-pankaj.dubey@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170330_061452_917317_37E1384A X-CRM114-Status: GOOD ( 13.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arnd@arndb.de, javier@osg.samsung.com, Pankaj Dubey , krzk@kernel.org, m.reichl@fivetechno.de, a.hajda@samsung.com, kgene@kernel.org, cwchoi00@gmail.com, m.szyprowski@samsung.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP For s2r various Exynos SoC needs different programming sequence and data. Currently this is handled by adding lots of soc_is_exynosMMM checks in the code, in an attempt to remove the dependency of such helper functions specific to each SoC, let's separate these programming sequence by introducing a new struct exynos_s2r_data. This struct will contain different function hooks and data for differentiating these programming sequences based on SoC's soc_id and revision parameters which can be matched by using generic API "soc_device_match". Signed-off-by: Pankaj Dubey --- arch/arm/mach-exynos/pm.c | 122 +++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 116 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 4a73b02..fa24098 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -30,6 +31,12 @@ #include "common.h" +struct exynos_s2r_data { + void (*enter_aftr)(void); +}; + +static const struct exynos_s2r_data *s2r_data; + static inline void __iomem *exynos_boot_vector_addr(void) { if (samsung_rev() == EXYNOS4210_REV_1_1) @@ -160,13 +167,26 @@ static int exynos_aftr_finisher(unsigned long flags) void exynos_enter_aftr(void) { + if (s2r_data && s2r_data->enter_aftr) + s2r_data->enter_aftr(); +} + +static void exynos3_enter_aftr(void) +{ unsigned int cpuid = smp_processor_id(); cpu_pm_enter(); + exynos_set_boot_flag(cpuid, C2_STATE); + exynos_pm_central_suspend(); + cpu_suspend(0, exynos_aftr_finisher); + exynos_pm_central_resume(); + exynos_clear_boot_flag(cpuid, C2_STATE); + cpu_pm_exit(); +} - if (of_machine_is_compatible("samsung,exynos3250")) - exynos_set_boot_flag(cpuid, C2_STATE); - +static void exynos4_enter_aftr(void) +{ + cpu_pm_enter(); exynos_pm_central_suspend(); if (of_machine_is_compatible("samsung,exynos4212") || @@ -185,13 +205,103 @@ void exynos_enter_aftr(void) } exynos_pm_central_resume(); + cpu_pm_exit(); +} - if (of_machine_is_compatible("samsung,exynos3250")) - exynos_clear_boot_flag(cpuid, C2_STATE); - +static void exynos5_enter_aftr(void) +{ + cpu_pm_enter(); + exynos_pm_central_suspend(); + cpu_suspend(0, exynos_aftr_finisher); + exynos_pm_central_resume(); cpu_pm_exit(); } +static const struct exynos_s2r_data exynos_common_s2r_data = { + .enter_aftr = exynos5_enter_aftr, +}; + +static const struct exynos_s2r_data exynos3250_s2r_data = { + .enter_aftr = exynos3_enter_aftr, +}; + +static const struct exynos_s2r_data exynos4210_rev11_s2r_data = { + .enter_aftr = exynos4_enter_aftr, +}; + +static const struct exynos_s2r_data exynos4210_rev10_s2r_data = { + .enter_aftr = exynos4_enter_aftr, +}; + +static const struct exynos_s2r_data exynos4x12_s2r_data = { + .enter_aftr = exynos4_enter_aftr, +}; + +static const struct soc_device_attribute exynos_soc_revision[] __initconst = { + { + .soc_id = "EXYNOS3250", + .data = &exynos3250_s2r_data + }, + { + .soc_id = "EXYNOS4210", + .revision = "11", + .data = &exynos4210_rev11_s2r_data + }, + { + .soc_id = "EXYNOS4210", + .revision = "10", + .data = &exynos4210_rev10_s2r_data + }, + { + .soc_id = "EXYNOS4212", + .data = &exynos4x12_s2r_data + }, + { + .soc_id = "EXYNOS4412", + .data = &exynos4x12_s2r_data + }, + { + .soc_id = "EXYNOS5250", + .data = &exynos_common_s2r_data + }, + { + .soc_id = "EXYNOS5260", + .data = &exynos_common_s2r_data + }, + { + .soc_id = "EXYNOS5440", + .data = &exynos_common_s2r_data + }, + { + .soc_id = "EXYNOS5410", + .data = &exynos_common_s2r_data + }, + { + .soc_id = "EXYNOS5420", + .data = &exynos_common_s2r_data + }, + { + .soc_id = "EXYNOS5800", + .data = &exynos_common_s2r_data + }, +}; + +int __init exynos_s2r_init(void) +{ + const struct soc_device_attribute *match; + + match = soc_device_match(exynos_soc_revision); + + if (match) + s2r_data = (const struct exynos_s2r_data *) match->data; + + if (!s2r_data) + return -ENODEV; + + return 0; +} +arch_initcall(exynos_s2r_init); + #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE) static atomic_t cpu1_wakeup = ATOMIC_INIT(0);