From patchwork Mon Apr 10 14:20:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 9672755 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D957860244 for ; Mon, 10 Apr 2017 14:20:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D7BCD277D9 for ; Mon, 10 Apr 2017 14:20:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CC59328179; Mon, 10 Apr 2017 14:20:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4BE88277D9 for ; Mon, 10 Apr 2017 14:20:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Juf0hkyDDWYJMNG7GPIgg7vhRhRTGse7uJpqO8yPZB8=; b=B3lHTPoy5RXhWk tiDEbdbR8XI+yQk59k3yB9XKvRUklX4EhJ5bA3iWx2Zrla70csURZ6wgliXBXKUUfzG9zayXSk1hv QF6W4oQGc8eRl7hsJOK0pKOLJykC/B8OYMaEqRXU3+JVonpM4Q4MRhU20JYaHgr3Dww1vvEz/0J7f 44s4Vb9IEVdhy5UljH5a+9YJKY5JXIHowjsPzvXU0Zop2Wdjw6gM5aYQiGff+7SG6uiOFfX9ddulc oN1Cebi2USyAQYSPbcxH9MRpxYcyKEeUAtYBMR8/ZX+VmPubMi0AMcQIQrNA9lV2D/PFIK7re7gDj NPGcSh2Yk1V8236BaHQQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cxaBd-0001eD-Cf; Mon, 10 Apr 2017 14:20:57 +0000 Received: from esa3.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cxaBZ-0001bq-UY for linux-arm-kernel@lists.infradead.org; Mon, 10 Apr 2017 14:20:55 +0000 X-IronPort-AV: E=Sophos;i="5.37,182,1488870000"; d="scan'208";a="1255088" Received: from exsmtp02.microchip.com (HELO email.microchip.com) ([198.175.253.38]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA; 10 Apr 2017 07:20:32 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.76.4) by chn-sv-exch02.mchp-main.com (10.10.76.38) with Microsoft SMTP Server id 14.3.181.6; Mon, 10 Apr 2017 07:20:31 -0700 From: Claudiu Beznea To: , , , , , Subject: [PATCH] drivers: pwm: pwm-atmel: implement suspend/resume functions Date: Mon, 10 Apr 2017 17:20:20 +0300 Message-ID: <1491834020-3194-1-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170410_072054_013797_D40C7EE0 X-CRM114-Status: GOOD ( 11.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: claudiu.beznea@microchip.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Implement suspend and resume power management specific function to allow PWM controller to correctly suspend and resume. Signed-off-by: Claudiu Beznea --- drivers/pwm/pwm-atmel.c | 81 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 530d7dc..75177c6 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -58,6 +58,8 @@ #define PWM_MAX_PRD 0xFFFF #define PRD_MAX_PRES 10 +#define PWM_MAX_CH_NUM (4) + struct atmel_pwm_registers { u8 period; u8 period_upd; @@ -65,11 +67,18 @@ struct atmel_pwm_registers { u8 duty_upd; }; +struct atmel_pwm_pm_ctx { + u32 cmr; + u32 cdty; + u32 cprd; +}; + struct atmel_pwm_chip { struct pwm_chip chip; struct clk *clk; void __iomem *base; const struct atmel_pwm_registers *regs; + struct atmel_pwm_pm_ctx ctx[PWM_MAX_CH_NUM]; unsigned int updated_pwms; /* ISR is cleared when read, ensure only one thread does that */ @@ -333,6 +342,77 @@ atmel_pwm_get_driver_data(struct platform_device *pdev) return (struct atmel_pwm_registers *)id->driver_data; } +#ifdef CONFIG_PM_SLEEP +static int atmel_pwm_suspend(struct device *dev) +{ + struct atmel_pwm_chip *atmel_pwm = dev_get_drvdata(dev); + struct pwm_device *pwm = atmel_pwm->chip.pwms; + int i; + bool disable_clk = false; + + for (i = 0; i < atmel_pwm->chip.npwm; i++, pwm++) { + if (!pwm_is_enabled(pwm)) + continue; + + disable_clk = true; + atmel_pwm->ctx[i].cdty = + atmel_pwm_ch_readl(atmel_pwm, i, + atmel_pwm->regs->duty); + atmel_pwm->ctx[i].cprd = + atmel_pwm_ch_readl(atmel_pwm, i, + atmel_pwm->regs->period); + atmel_pwm->ctx[i].cmr = + atmel_pwm_ch_readl(atmel_pwm, i, PWM_CMR); + + atmel_pwm_disable(&atmel_pwm->chip, pwm, false); + } + + if (disable_clk) + clk_disable(atmel_pwm->clk); + + return 0; +} + +static int atmel_pwm_resume(struct device *dev) +{ + struct atmel_pwm_chip *atmel_pwm = dev_get_drvdata(dev); + struct pwm_device *pwm = atmel_pwm->chip.pwms; + int i, ret; + bool disable_clk = true; + + ret = clk_enable(atmel_pwm->clk); + if (ret) { + dev_err(dev, "failed to enable clock\n"); + return ret; + } + + for (i = 0; i < atmel_pwm->chip.npwm; i++, pwm++) { + if (!pwm_is_enabled(pwm)) + continue; + + disable_clk = false; + atmel_pwm_ch_writel(atmel_pwm, i, PWM_CMR, + atmel_pwm->ctx[i].cmr); + atmel_pwm_set_cprd_cdty(&atmel_pwm->chip, pwm, + atmel_pwm->ctx[i].cprd, + atmel_pwm->ctx[i].cdty); + mutex_lock(&atmel_pwm->isr_lock); + atmel_pwm->updated_pwms |= atmel_pwm_readl(atmel_pwm, PWM_ISR); + atmel_pwm->updated_pwms &= ~(1 << pwm->hwpwm); + mutex_unlock(&atmel_pwm->isr_lock); + atmel_pwm_writel(atmel_pwm, PWM_ENA, 1 << pwm->hwpwm); + } + + if (disable_clk) + clk_disable(atmel_pwm->clk); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(atmel_pwm_pm_ops, + atmel_pwm_suspend, atmel_pwm_resume); + static int atmel_pwm_probe(struct platform_device *pdev) { const struct atmel_pwm_registers *regs; @@ -406,6 +486,7 @@ static struct platform_driver atmel_pwm_driver = { .driver = { .name = "atmel-pwm", .of_match_table = of_match_ptr(atmel_pwm_dt_ids), + .pm = &atmel_pwm_pm_ops, }, .id_table = atmel_pwm_devtypes, .probe = atmel_pwm_probe,