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Mon, 10 Apr 2017 21:35:43 +0000 From: Yury Norov To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] arm64/locking: qspinlocks and qrwlocks support Date: Tue, 11 Apr 2017 01:35:04 +0400 Message-Id: <1491860104-4103-4-git-send-email-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491860104-4103-1-git-send-email-ynorov@caviumnetworks.com> References: <1491860104-4103-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 X-Originating-IP: [217.118.90.188] X-ClientProxiedBy: HE1PR0802CA0021.eurprd08.prod.outlook.com (10.172.123.159) To BY1PR0701MB1271.namprd07.prod.outlook.com (10.160.108.17) X-MS-Office365-Filtering-Correlation-Id: 03f8ed3c-55f9-46d7-0343-08d480598b04 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(201703131423075)(201703031133081); SRVR:BY1PR0701MB1271; X-Microsoft-Exchange-Diagnostics: 1; BY1PR0701MB1271; 3:9dQe+DFCmu2JVKcpSnhvMHTE8m+LhGS3TGuznvICvGCE8LgMhewVEGIMC1SMpjzwGO6IU96cuZlR2Tk3kjLHx8QaguMi3IOoAXTbWH30bW55Kisth0JFyUszhi1lDaH7gAV4bnVplfI143g6s11XmYotNBYtRb/Inzbb3NovLg+OJK/5ZBn2mQldPiG0RoY85wbY7vje/epf8iY1Y3S3jwjH7+gCIz8xw0JO73C4dyhkCLJ2IC3bamhQPgifrUt557lfbXN1wyxhFG+u1Lu8oD5y3vZcNbdl1OypkOCwitn0e2AC8LqE2FIW1ze02XF5y4NW/sMpSh+GIc1KTN5cJQ==; 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Signed-off-by: Jan Glauber Note. This patch removes protection from direct inclusion of arch/arm64/include/asm/spinlock_types.h. It's done because kernel/locking/qrwlock.c file does it thru the header include/asm-generic/qrwlock_types.h. Until now the only user of qrwlock.c was x86, and there's no such protection too. I'm not happy to remove the protection, but if it's OK for x86, it should be also OK for arm64. If not, I think we'd fix it for x86, and add the protection there too. Yury Signed-off-by: Yury Norov --- arch/arm64/Kconfig | 2 ++ arch/arm64/include/asm/qrwlock.h | 7 +++++++ arch/arm64/include/asm/qspinlock.h | 20 ++++++++++++++++++++ arch/arm64/include/asm/spinlock.h | 12 ++++++++++++ arch/arm64/include/asm/spinlock_types.h | 14 +++++++++++--- 5 files changed, 52 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/include/asm/qrwlock.h create mode 100644 arch/arm64/include/asm/qspinlock.h diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index f2b0b52..ac1c170 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -24,6 +24,8 @@ config ARM64 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION select ARCH_WANT_FRAME_POINTERS select ARCH_HAS_UBSAN_SANITIZE_ALL + select ARCH_USE_QUEUED_SPINLOCKS + select ARCH_USE_QUEUED_RWLOCKS select ARM_AMBA select ARM_ARCH_TIMER select ARM_GIC diff --git a/arch/arm64/include/asm/qrwlock.h b/arch/arm64/include/asm/qrwlock.h new file mode 100644 index 0000000..626f6eb --- /dev/null +++ b/arch/arm64/include/asm/qrwlock.h @@ -0,0 +1,7 @@ +#ifndef _ASM_ARM64_QRWLOCK_H +#define _ASM_ARM64_QRWLOCK_H + +#include +#include + +#endif /* _ASM_ARM64_QRWLOCK_H */ diff --git a/arch/arm64/include/asm/qspinlock.h b/arch/arm64/include/asm/qspinlock.h new file mode 100644 index 0000000..98f50fc --- /dev/null +++ b/arch/arm64/include/asm/qspinlock.h @@ -0,0 +1,20 @@ +#ifndef _ASM_ARM64_QSPINLOCK_H +#define _ASM_ARM64_QSPINLOCK_H + +#include + +#define queued_spin_unlock queued_spin_unlock +/** + * queued_spin_unlock - release a queued spinlock + * @lock : Pointer to queued spinlock structure + * + * A smp_store_release() on the least-significant byte. + */ +static inline void queued_spin_unlock(struct qspinlock *lock) +{ + smp_store_release((u8 *)lock, 0); +} + +#include + +#endif /* _ASM_ARM64_QSPINLOCK_H */ diff --git a/arch/arm64/include/asm/spinlock.h b/arch/arm64/include/asm/spinlock.h index cae331d..3771339 100644 --- a/arch/arm64/include/asm/spinlock.h +++ b/arch/arm64/include/asm/spinlock.h @@ -20,6 +20,10 @@ #include #include +#ifdef CONFIG_QUEUED_SPINLOCKS +#include +#else + /* * Spinlock implementation. * @@ -187,6 +191,12 @@ static inline int arch_spin_is_contended(arch_spinlock_t *lock) } #define arch_spin_is_contended arch_spin_is_contended +#endif /* CONFIG_QUEUED_SPINLOCKS */ + +#ifdef CONFIG_QUEUED_RWLOCKS +#include +#else + /* * Write lock implementation. * @@ -351,6 +361,8 @@ static inline int arch_read_trylock(arch_rwlock_t *rw) /* read_can_lock - would read_trylock() succeed? */ #define arch_read_can_lock(x) ((x)->lock < 0x80000000) +#endif /* CONFIG_QUEUED_RWLOCKS */ + #define arch_read_lock_flags(lock, flags) arch_read_lock(lock) #define arch_write_lock_flags(lock, flags) arch_write_lock(lock) diff --git a/arch/arm64/include/asm/spinlock_types.h b/arch/arm64/include/asm/spinlock_types.h index 55be59a..0f0f156 100644 --- a/arch/arm64/include/asm/spinlock_types.h +++ b/arch/arm64/include/asm/spinlock_types.h @@ -16,9 +16,9 @@ #ifndef __ASM_SPINLOCK_TYPES_H #define __ASM_SPINLOCK_TYPES_H -#if !defined(__LINUX_SPINLOCK_TYPES_H) && !defined(__ASM_SPINLOCK_H) -# error "please don't include this file directly" -#endif +#ifdef CONFIG_QUEUED_SPINLOCKS +#include +#else #include @@ -36,10 +36,18 @@ typedef struct { #define __ARCH_SPIN_LOCK_UNLOCKED { 0 , 0 } +#endif /* CONFIG_QUEUED_SPINLOCKS */ + +#ifdef CONFIG_QUEUED_RWLOCKS +#include +#else + typedef struct { volatile unsigned int lock; } arch_rwlock_t; #define __ARCH_RW_LOCK_UNLOCKED { 0 } +#endif /* CONFIG_QUEUED_RWLOCKS */ + #endif