@@ -485,4 +485,24 @@
reg = <0 0x1b000000 0 0x1000>;
#clock-cells = <1>;
};
+
+ eth: ethernet@1b100000 {
+ compatible = "mediatek,mt2701-eth", "syscon";
+ reg = <0 0x1b100000 0 0x20000>;
+ interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
+ <ðsys CLK_ETHSYS_ESW>,
+ <ðsys CLK_ETHSYS_GP1>,
+ <ðsys CLK_ETHSYS_GP2>,
+ <&apmixedsys CLK_APMIXED_TRGPLL>;
+ clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
+ mediatek,ethsys = <ðsys>;
+ mediatek,pctl = <&syscfg_pctl_a>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};