From patchwork Thu May 11 08:19:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaokun Zhang X-Patchwork-Id: 9721043 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 073E96031B for ; Thu, 11 May 2017 07:50:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 031252860F for ; Thu, 11 May 2017 07:50:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EBEBD28669; Thu, 11 May 2017 07:50:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 91A5F2860F for ; Thu, 11 May 2017 07:50:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=kBGo/dUyrvrGXBajrBq1kDnTQ6srJkfVO/7a2yJfPVw=; b=BySe1D2vYDYnx8 YM4E9H+8t7ueEigeLM2BJuvigDNPtmdBkoI2EUFkuEH3DstFoR0IyO8ZVICoOrZKzLXCz8f78wFMM CIdtvaOJttk1oUR00D9XPgZoGUYDqWVRl7yfqC6gF11HigQ4u1qWyiQV/sktNNPiTaWOHCxOKHQlx Zi/t0JpckV6qY06aCLuLLOYFmDqBFwzlNGMNUgVRikksSNniwcOBwER/REGmP1wXOKZCS31nFOG1+ rQaJfKFNkRsmoJTljfC+3+sGesbdwAzLBJhiGTk9F1ZEQQ4hZ9QTtLNjRIPg5fsplmEiBcWtq6mBf ezL+PV/OI8EM/VRcqfUw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1d8irM-0000bS-31; Thu, 11 May 2017 07:50:04 +0000 Received: from szxga02-in.huawei.com ([45.249.212.188]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1d8irI-0000Ff-94 for linux-arm-kernel@lists.infradead.org; Thu, 11 May 2017 07:50:01 +0000 Received: from 172.30.72.57 (EHLO DGGEML404-HUB.china.huawei.com) ([172.30.72.57]) by dggrg02-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id ANH98745; Thu, 11 May 2017 15:49:30 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEML404-HUB.china.huawei.com (10.3.17.39) with Microsoft SMTP Server id 14.3.301.0; Thu, 11 May 2017 15:48:50 +0800 From: Shaokun Zhang To: , , Subject: [PATCH] arm64: mm: check length in sync_icache_aliases for performance Date: Thu, 11 May 2017 16:19:32 +0800 Message-ID: <1494490772-203184-1-git-send-email-zhangshaokun@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.5914178B.00B1, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 95a2d12ded5e26f09868b955dc3887f1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170511_005000_485308_DA438203 X-CRM114-Status: UNSURE ( 9.95 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Shaokun Zhang , linux-arm-kernel@lists.infradead.org, ashoks@broadcom.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP sync_icache_aliases calls flush_icache_range if icache is non-aliasing policy[see 0a28714 ("arm64: Use PoU cache instr for I/D coherency")]. If icache uses non-aliasing and page size is 64K, it will broadcast 1K DVMs(IC IVAU) to other cpu cores per page. In multi-cores system, so many DVMs would degenerate performance. Even if page size is 4K, 64 DVMs will be broadcasted and executed. This patch fixes this issue using invalidation icache all instread of by VA when length is one or multiple PAGE_SIZE, especailly for __sync_icache_dcache. Signed-off-by: Shaokun Zhang --- arch/arm64/mm/flush.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c index 21a8d82..f71da2d 100644 --- a/arch/arm64/mm/flush.c +++ b/arch/arm64/mm/flush.c @@ -29,7 +29,7 @@ void sync_icache_aliases(void *kaddr, unsigned long len) { unsigned long addr = (unsigned long)kaddr; - if (icache_is_aliasing()) { + if ((len >= PAGE_SIZE) || icache_is_aliasing()) { __clean_dcache_area_pou(kaddr, len); __flush_icache_all(); } else {