From patchwork Mon May 22 12:48:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaokun Zhang X-Patchwork-Id: 9740117 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 48DFB601C2 for ; Mon, 22 May 2017 12:27:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 37839286CF for ; Mon, 22 May 2017 12:27:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 29D8E286F1; Mon, 22 May 2017 12:27:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B74CD286CF for ; Mon, 22 May 2017 12:27:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=KuKiwMfWNmeEwj8+Zspj6/2o2MUwMCnn3yRaWdFDWX4=; b=HG6yVbBCelXGZh 4WELaP6WsWE6xA/SS0cvVx/1sIozXK8WI5izQg0m25GHtBOhiLLyG35VWET/dZ62GBF9KE77Bz/O7 6zLwqYUfXaXZAwnCcabf6+sh4bgERstkMtvDoD7UXjMJM21yvo0LS0j+R2fiGO5l0KKQ7pZNc9xz5 SwH3FHGxKxlxetU2YbcuucjojHtxxqvy8pilLhegG2XY0u4Peju8RopsMbTHrj7rEOZn1jJr0KRiR jENfGWf7jRAUagk7xvslZ+l4XUmS2LBgrC6HcEr609+hkcfPOFyX+QeuWKsJNKS/4r15wMKif6OT5 KXaVCKyM1NhkQSnB3Ypw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dCmQi-00022p-00; Mon, 22 May 2017 12:27:20 +0000 Received: from szxga01-in.huawei.com ([45.249.212.187]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dCmHO-00042I-1T for linux-arm-kernel@lists.infradead.org; Mon, 22 May 2017 12:17:44 +0000 Received: from 172.30.72.55 (EHLO dggeml405-hub.china.huawei.com) ([172.30.72.55]) by dggrg01-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id APA29797; Mon, 22 May 2017 20:17:17 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by dggeml405-hub.china.huawei.com (10.3.17.49) with Microsoft SMTP Server id 14.3.301.0; Mon, 22 May 2017 20:17:08 +0800 From: Shaokun Zhang To: , , Subject: [PATCH v8 2/9] dt-bindings: hisi: Add Hisilicon HiP05/06/07 Djtag dts bindings Date: Mon, 22 May 2017 20:48:14 +0800 Message-ID: <1495457294-233366-1-git-send-email-zhangshaokun@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.5922D6CE.008D, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 68d9c1467c85bad33c42a0ddcbf779c9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170522_051742_488266_E841FC27 X-CRM114-Status: GOOD ( 11.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dikshit.n@huawei.com, devicetree@vger.kernel.org, wangkefeng.wang@huawei.com, anurupvasu@gmail.com, gabriele.paoloni@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, shyju.pv@huawei.com, linux-kernel@vger.kernel.org, xuwei5@hisilicon.com, linuxarm@huawei.com, zhangshaokun@hisilicon.com, sanil.kumar@hisilicon.com, linux-arm-kernel@lists.infradead.org, shiju.jose@huawei.com, tanxiaojun@huawei.com, anurup.m@huawei.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tan Xiaojun Add Hisilicon HiP05/06/07 Djtag dts bindings for CPU and IO Die Signed-off-by: Tan Xiaojun Signed-off-by: Anurup M Acked-by: Rob Herring --- .../devicetree/bindings/arm/hisilicon/djtag.txt | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/djtag.txt diff --git a/Documentation/devicetree/bindings/arm/hisilicon/djtag.txt b/Documentation/devicetree/bindings/arm/hisilicon/djtag.txt new file mode 100644 index 0000000..fde5bab --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/djtag.txt @@ -0,0 +1,51 @@ +The Hisilicon Djtag is an independent component which connects with some other +components in the SoC by Debug Bus. The djtag is available in CPU and IO dies +in the chip. The djtag controls access to connecting modules of CPU and IO +dies. +The various connecting components in CPU die (like L3 cache, L3 cache PMU etc.) +are accessed by djtag during real time debugging. In IO die there are connecting +components like RSA. These components appear as devices attached to djtag bus. + +Hisilicon HiP05/06/07 djtag for CPU die +Required properties: + - compatible : The value should be as follows + (a) "hisilicon,hip05-cpu-djtag-v1" for CPU die which use v1 hw in + HiP05 chipset. + (b) "hisilicon,hip06-cpu-djtag-v1" for CPU die which use v1 hw in + HiP06 chipset. + (c) "hisilicon,hip07-cpu-djtag-v2" for CPU die which use v2 hw in + HiP07 chipset. + - reg : Register address and size + - hisilicon,scl-id : The Super Cluster ID for CPU or IO die + +Example 1: Djtag for CPU die in HiP07 + + /* for Hisilicon HiP07 djtag for CPU Die */ + djtag0: djtag@60010000 { + compatible = "hisilicon,hip07-cpu-djtag-v2"; + reg = <0x0 0x60010000 0x0 0x10000>; + hisilicon,scl-id = <0x03>; + + /* All connecting components will appear as child nodes */ + }; + +Hisilicon HiP05/06/07 djtag for IO die +Required properties: + - compatible : The value should be as follows + (a) "hisilicon,hip05-io-djtag-v1" for IO die which use v1 hw in + HiP05 chipset. + (c) "hisilicon,hip06-io-djtag-v2" for IO die which use v2 hw in + HiP06 chipset. + (d) "hisilicon,hip07-io-djtag-v2" for IO die which use v2 hw in + HiP07 chipset + +Example 2: Djtag for IO die in HiP05 + + /* for Hisilicon HiP05 djtag for IO Die */ + djtag1: djtag@d0000000 { + compatible = "hisilicon,hip05-io-djtag-v1"; + reg = <0x0 0xd0000000 0x0 0x10000>; + hisilicon,scl-id = <0x0>; + + /* All connecting components will appear as child nodes */ + };