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Fri, 26 May 2017 02:26:24 -0700 (PDT) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id v62sm5832259wmv.15.2017.05.26.02.26.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 26 May 2017 02:26:24 -0700 (PDT) From: Anup Patel To: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd Subject: [PATCH v5 04/11] arm64: dts: Initial DTS files for Broadcom Stingray SOC Date: Fri, 26 May 2017 14:54:57 +0530 Message-Id: <1495790704-2438-5-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495790704-2438-1-git-send-email-anup.patel@broadcom.com> References: <1495790704-2438-1-git-send-email-anup.patel@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170526_022648_236703_00421192 X-CRM114-Status: GOOD ( 16.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Florian Fainelli , Sandeep Tripathy , Anup Patel , Scott Branden , Scott Branden , Jon Mason , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, Pramod Kumar , Oza Pawandeep , Ray Jui , Srinath Mannam , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Broadcom Stingray SoC is a new member in Broadcom iProc SoC family. This patch adds initial DTS files for Broadcom Stingray SoC and two of its reference boards (bcm958742k and bcm958742t). We have lot of reference boards and large number of devices in Broadcom Stingray SoC so eventually we will have quite a few DTS files for Stingray. To tackle, we have added a separate directory for Stingray DTS files. Signed-off-by: Anup Patel Signed-off-by: Scott Branden Reviewed-by: Ray Jui --- arch/arm64/boot/dts/broadcom/Makefile | 1 + arch/arm64/boot/dts/broadcom/stingray/Makefile | 6 + .../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 55 ++++ .../boot/dts/broadcom/stingray/bcm958742k.dts | 48 ++++ .../boot/dts/broadcom/stingray/bcm958742t.dts | 40 +++ .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 302 +++++++++++++++++++++ 6 files changed, 452 insertions(+) create mode 100644 arch/arm64/boot/dts/broadcom/stingray/Makefile create mode 100644 arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi create mode 100644 arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts create mode 100644 arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts create mode 100644 arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index bfa8f8e..f11bdd6 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -1,6 +1,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb +dts-dirs := stingray always := $(dtb-y) subdir-y := $(dts-dirs) clean-files := *.dtb diff --git a/arch/arm64/boot/dts/broadcom/stingray/Makefile b/arch/arm64/boot/dts/broadcom/stingray/Makefile new file mode 100644 index 0000000..f70028e --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/Makefile @@ -0,0 +1,6 @@ +dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742k.dtb +dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742t.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi new file mode 100644 index 0000000..992944b --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi @@ -0,0 +1,55 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "stingray.dtsi" + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + }; +}; + +&memory { /* Default DRAM banks */ + reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */ + <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */ +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts new file mode 100644 index 0000000..c309cda --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts @@ -0,0 +1,48 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +#include "bcm958742-base.dtsi" + +/ { + compatible = "brcm,bcm958742k", "brcm,stingray"; + model = "Stingray Combo SVK (BCM958742K)"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts b/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts new file mode 100644 index 0000000..6ebe399 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts @@ -0,0 +1,40 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/dts-v1/; + +#include "bcm958742-base.dtsi" + +/ { + compatible = "brcm,bcm958742t", "brcm,stingray"; + model = "Stingray SST100 (BCM958742T)"; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi new file mode 100644 index 0000000..9fe19a2 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -0,0 +1,302 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2015-2017 Broadcom. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Broadcom nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +/ { + compatible = "brcm,stingray"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@000 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&CLUSTER0_L2>; + }; + + cpu@001 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&CLUSTER0_L2>; + }; + + cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + next-level-cache = <&CLUSTER1_L2>; + }; + + cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "psci"; + next-level-cache = <&CLUSTER1_L2>; + }; + + cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + next-level-cache = <&CLUSTER2_L2>; + }; + + cpu@201 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x201>; + enable-method = "psci"; + next-level-cache = <&CLUSTER2_L2>; + }; + + cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + next-level-cache = <&CLUSTER3_L2>; + }; + + cpu@301 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0x0 0x301>; + enable-method = "psci"; + next-level-cache = <&CLUSTER3_L2>; + }; + + CLUSTER0_L2: l2-cache@000 { + compatible = "cache"; + }; + + CLUSTER1_L2: l2-cache@100 { + compatible = "cache"; + }; + + CLUSTER2_L2: l2-cache@200 { + compatible = "cache"; + }; + + CLUSTER3_L2: l2-cache@300 { + compatible = "cache"; + }; + }; + + memory: memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x40000000>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + scr { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x61000000 0x05000000>; + + gic: interrupt-controller@63c00000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + interrupt-controller; + reg = <0x02c00000 0x010000>, /* GICD */ + <0x02e00000 0x600000>; /* GICR */ + interrupts = ; + + gic_its: gic-its@63c20000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x02c20000 0x10000>; + }; + }; + + smmu: mmu@64000000 { + compatible = "arm,mmu-500"; + reg = <0x03000000 0x80000>; + #global-interrupts = <1>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + #iommu-cells = <2>; + }; + }; + + hsls { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x68900000 0x17700000>; + + uart0: uart@68a00000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x00100000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = ; + status = "disabled"; + }; + + uart1: uart@68a10000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x00110000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = ; + status = "disabled"; + }; + + uart2: uart@68a20000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x00120000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = ; + status = "disabled"; + }; + + uart3: uart@68a30000 { + device_type = "serial"; + compatible = "snps,dw-apb-uart"; + reg = <0x00130000 0x1000>; + reg-shift = <2>; + clock-frequency = <25000000>; + interrupt-parent = <&gic>; + interrupts = ; + status = "disabled"; + }; + + hwrng: hwrng@68b20000 { + compatible = "brcm,iproc-rng200"; + reg = <0x00220000 0x28>; + }; + }; +};