From patchwork Mon May 29 16:17:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 9753445 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 78ACD602B1 for ; Mon, 29 May 2017 16:18:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6AB3826D05 for ; Mon, 29 May 2017 16:18:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5EB0F27FB6; Mon, 29 May 2017 16:18:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CB47226D05 for ; Mon, 29 May 2017 16:18:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=q0kitTVdIKzczLPNcCAB0RU2SWcVlmBUA1M+7xMVhOY=; b=eKrYqBL75p9N6u /JF9znvjrUaBICoNL6WnpqyCIB5vjvW2wuMHAIQYDQVpl+uxlc2ZRVcyZlvovYrpq+++bvJ8HuTwA AoLFQyK0I/cCY7I6ZEDt21CgLKrG+iZWHbQhMr9EfsT335CfUTqJ2LbSud4kTW0u/HDbaz76PkjW6 lVGnvHx8gndafIzh0dLyYnkKz5/G08Bo5tpN6WlE7rMuvOKmWRtriKAE31GMU1nhrUJjfzPukLHyw WLDsuXF0EpENtpx1OhkSfdHptMQ+OESoaY0OkcIiSN8r8rQLyTawheyZnyyuOPEHtli131WDmYhIY xQjPB+4fkA1RCBm68O9A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dFNN9-0005Zq-Rm; Mon, 29 May 2017 16:18:23 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dFNMw-0005ML-E6 for linux-arm-kernel@lists.infradead.org; Mon, 29 May 2017 16:18:12 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v4TGEABB017418; Mon, 29 May 2017 18:17:44 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-.pphosted.com with ESMTP id 2apxk3n2jm-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 29 May 2017 18:17:44 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id F06D134; Mon, 29 May 2017 16:17:43 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C99FC178E; Mon, 29 May 2017 16:17:43 +0000 (GMT) Received: from localhost (10.75.127.45) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1178.4; Mon, 29 May 2017 18:17:42 +0200 From: Alexandre TORGUE To: Linus Walleij , Maxime Coquelin , Patrice Chotard , Paul Gortmaker , Rob Herring Subject: [PATCH v2 1/3] pinctrl: stm32: set pin to gpio input when used as interrupt Date: Mon, 29 May 2017 18:17:31 +0200 Message-ID: <1496074653-2941-2-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1496074653-2941-1-git-send-email-alexandre.torgue@st.com> References: <1496074653-2941-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG6NODE2.st.com (10.75.127.17) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-05-29_11:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170529_091810_774681_E19CF4F8 X-CRM114-Status: GOOD ( 10.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch ensures that pin is correctly set as gpio input when it is used as an interrupt. Signed-off-by: Alexandre TORGUE diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index d3c5f5d..5a15c7d 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -219,12 +219,41 @@ static int stm32_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) .to_irq = stm32_gpio_to_irq, }; +static int stm32_gpio_irq_request_resources(struct irq_data *irq_data) +{ + struct stm32_gpio_bank *bank = irq_data->domain->host_data; + struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); + int ret; + + ret = stm32_gpio_direction_input(&bank->gpio_chip, irq_data->hwirq); + if (ret) + return ret; + + ret = gpiochip_lock_as_irq(&bank->gpio_chip, irq_data->hwirq); + if (ret) { + dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n", + irq_data->hwirq); + return ret; + } + + return 0; +} + +static void stm32_gpio_irq_release_resources(struct irq_data *irq_data) +{ + struct stm32_gpio_bank *bank = irq_data->domain->host_data; + + gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq); +} + static struct irq_chip stm32_gpio_irq_chip = { .name = "stm32gpio", .irq_eoi = irq_chip_eoi_parent, .irq_mask = irq_chip_mask_parent, .irq_unmask = irq_chip_unmask_parent, .irq_set_type = irq_chip_set_type_parent, + .irq_request_resources = stm32_gpio_irq_request_resources, + .irq_release_resources = stm32_gpio_irq_release_resources, }; static int stm32_gpio_domain_translate(struct irq_domain *d, @@ -248,15 +277,6 @@ static void stm32_gpio_domain_activate(struct irq_domain *d, struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_nr); - gpiochip_lock_as_irq(&bank->gpio_chip, irq_data->hwirq); -} - -static void stm32_gpio_domain_deactivate(struct irq_domain *d, - struct irq_data *irq_data) -{ - struct stm32_gpio_bank *bank = d->host_data; - - gpiochip_unlock_as_irq(&bank->gpio_chip, irq_data->hwirq); } static int stm32_gpio_domain_alloc(struct irq_domain *d, @@ -285,7 +305,6 @@ static int stm32_gpio_domain_alloc(struct irq_domain *d, .alloc = stm32_gpio_domain_alloc, .free = irq_domain_free_irqs_common, .activate = stm32_gpio_domain_activate, - .deactivate = stm32_gpio_domain_deactivate, }; /* Pinctrl functions */