From patchwork Tue May 30 09:16:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 9754173 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 61588602BF for ; Tue, 30 May 2017 09:17:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5346227569 for ; Tue, 30 May 2017 09:17:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4645127F10; Tue, 30 May 2017 09:17:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 00CC327569 for ; Tue, 30 May 2017 09:17:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=GmPU/AU+RWw04wTQCB7rdpWk2DsaHhyYaS358uf0pg8=; b=j5SK3900a+EkpeZkDyQajlFVVW 2JV0olOqzLhJIErkXYGlf8Nhj3/rvOwZLwwtLnPaWYYMRtwW/a+S2Kb6ghroVNLvGqm9saU4nGl67 8BdgBrdHgMUePCarblOUJLdg6eYjK+OitexEiThATjkfH2hYAKgcPDYCac5J4jndufHPx+sPmBBqv DMtQ5USJttAwuTpdSf22UITjDgpHOR9AamPsgx8qCyjGtYUgnH2EZWDH4LuPnJF4ZDf9ICtqrtIoG RYLfXRwkdVkTM6svEIIK73DK3KH8v0YaYU3qRq9A0Co1phgOQjtp1hDvbbRSkGS0VR/tLydKnBIg+ S4NraItg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dFdGz-0002IT-IR; Tue, 30 May 2017 09:17:05 +0000 Received: from mail.free-electrons.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dFdGk-00021i-W0 for linux-arm-kernel@lists.infradead.org; Tue, 30 May 2017 09:16:52 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id 330FF20EDF; Tue, 30 May 2017 11:16:29 +0200 (CEST) Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 0A06820411; Tue, 30 May 2017 11:16:29 +0200 (CEST) From: Thomas Petazzoni To: Thomas Gleixner , Jason Cooper , Marc Zyngier , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Ian Campbell , Pawel Moll , Mark Rutland , Kumar Gala , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement Subject: [PATCH 3/6] irqchip: irq-mvebu-gicp: new driver for Marvell GICP Date: Tue, 30 May 2017 11:16:08 +0200 Message-Id: <1496135772-20694-4-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496135772-20694-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1496135772-20694-1-git-send-email-thomas.petazzoni@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170530_021651_341382_25BDADE5 X-CRM114-Status: GOOD ( 20.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Petazzoni , Yehuda Yitschak , Antoine Tenart , Nadav Haklai , Hanna Hawa , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This commit adds a simple driver for the Marvell GICP, a hardware unit that converts memory writes into GIC SPI interrupts. The driver doesn't do anything but clear all interrupts at boot time, to avoid spurious interrupts left by the firmware. The GICP registers are directly written to in hardware by the ICU unit, which is configured in a separate driver. Signed-off-by: Thomas Petazzoni --- drivers/irqchip/Kconfig | 3 +++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-mvebu-gicp.c | 53 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 57 insertions(+) create mode 100644 drivers/irqchip/irq-mvebu-gicp.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 478f8ac..e527ee5 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -268,6 +268,9 @@ config IRQ_MXS select IRQ_DOMAIN select STMP_DEVICE +config MVEBU_GICP + bool + config MVEBU_ODMI bool select GENERIC_MSI_IRQ_DOMAIN diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index b64c59b..11eb858 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -69,6 +69,7 @@ obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o +obj-$(CONFIG_MVEBU_GICP) += irq-mvebu-gicp.o obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o obj-$(CONFIG_MVEBU_PIC) += irq-mvebu-pic.o obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o diff --git a/drivers/irqchip/irq-mvebu-gicp.c b/drivers/irqchip/irq-mvebu-gicp.c new file mode 100644 index 0000000..4effed4 --- /dev/null +++ b/drivers/irqchip/irq-mvebu-gicp.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2017 Marvell + * + * Thomas Petazzoni + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include + +#define GICP_SETSPI_NSR_OFFSET 0x0 +#define GICP_CLRSPI_NSR_OFFSET 0x8 + +#define GICP_INT_COUNT 128 + +static int mvebu_gicp_probe(struct platform_device *pdev) +{ + void __iomem *regs; + struct resource *res; + int i; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + regs = ioremap(res->start, resource_size(res)); + if (!regs) + return -ENOMEM; + + for (i = 0; i < GICP_INT_COUNT; i++) + writel(i, regs + GICP_CLRSPI_NSR_OFFSET); + + iounmap(regs); + + return 0; +} + +static const struct of_device_id mvebu_gicp_of_match[] = { + { .compatible = "marvell,gicp", }, + {}, +}; + +static struct platform_driver mvebu_gicp_driver = { + .probe = mvebu_gicp_probe, + .driver = { + .name = "mvebu-gicp", + .of_match_table = mvebu_gicp_of_match, + }, +}; +builtin_platform_driver(mvebu_gicp_driver);