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Thu, 01 Jun 2017 23:37:02 -0700 (PDT) Received: from anup-HP-Compaq-8100-Elite-CMT-PC.dhcp.avagotech.net ([192.19.237.250]) by smtp.gmail.com with ESMTPSA id p65sm1767170wmf.24.2017.06.01.23.36.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 01 Jun 2017 23:37:02 -0700 (PDT) From: Anup Patel To: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd Subject: [PATCH v6 11/11] arm64: dts: Add PWM and SDHCI DT nodes for Stingray SOC Date: Fri, 2 Jun 2017 12:04:35 +0530 Message-Id: <1496385275-6899-12-git-send-email-anup.patel@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496385275-6899-1-git-send-email-anup.patel@broadcom.com> References: <1496385275-6899-1-git-send-email-anup.patel@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170602_023725_036290_A8CE7589 X-CRM114-Status: GOOD ( 10.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Florian Fainelli , Sandeep Tripathy , Anup Patel , Scott Branden , Jon Mason , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, Pramod Kumar , Oza Pawandeep , Ray Jui , Srinath Mannam , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Srinath Mannam The Stingray SoC has two instances of SDHCI controller and one instance of iProc PWM. Let's enable above mentioned devices in Stingray DT. Signed-off-by: Srinath Mannam Signed-off-by: Anup Patel Reviewed-by: Ray Jui Reviewed-by: Scott Branden --- .../boot/dts/broadcom/stingray/bcm958742-base.dtsi | 39 ++++++++++++++++++++++ .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 28 ++++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi index ff59a26..5dca7d1 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi @@ -43,6 +43,28 @@ serial2 = &uart2; serial3 = &uart3; }; + + sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl { + compatible = "regulator-gpio"; + regulator-name = "sdio0_vddo_ctrl_reg"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&pca9505 18 0>; + states = <3300000 0x0 + 1800000 0x1>; + }; + + sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl { + compatible = "regulator-gpio"; + regulator-name = "sdio1_vddo_ctrl_reg"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&pca9505 19 0>; + states = <3300000 0x0 + 1800000 0x1>; + }; }; &memory { /* Default DRAM banks */ @@ -54,6 +76,10 @@ status = "okay"; }; +&pwm { + status = "okay"; +}; + &i2c0 { status = "okay"; @@ -90,3 +116,16 @@ #size-cells = <1>; }; }; + +&sdio0 { + vqmmc-supply = <&sdio0_vddo_ctrl_reg>; + non-removable; + full-pwr-cycle; + status = "okay"; +}; + +&sdio1 { + vqmmc-supply = <&sdio1_vddo_ctrl_reg>; + full-pwr-cycle; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi index 88a6176..49933cf 100644 --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi @@ -269,6 +269,14 @@ #include "stingray-pinctrl.dtsi" + pwm: pwm@00010000 { + compatible = "brcm,iproc-pwm"; + reg = <0x00010000 0x1000>; + clocks = <&crmu_ref25m>; + #pwm-cells = <3>; + status = "disabled"; + }; + i2c0: i2c@000b0000 { compatible = "brcm,iproc-i2c"; reg = <0x000b0000 0x100>; @@ -428,5 +436,25 @@ brcm,nand-has-wp; status = "disabled"; }; + + sdio0: sdhci@003f1000 { + compatible = "brcm,sdhci-iproc"; + reg = <0x003f1000 0x100>; + interrupts = ; + bus-width = <8>; + clocks = <&sdio0_clk>; + iommus = <&smmu 0x6002 0x0000>; + status = "disabled"; + }; + + sdio1: sdhci@003f2000 { + compatible = "brcm,sdhci-iproc"; + reg = <0x003f2000 0x100>; + interrupts = ; + bus-width = <8>; + clocks = <&sdio1_clk>; + iommus = <&smmu 0x6003 0x0000>; + status = "disabled"; + }; }; };