From patchwork Wed Jun 7 17:45:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Troy Kisky X-Patchwork-Id: 9772093 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 283F960350 for ; Wed, 7 Jun 2017 17:46:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 41833284C5 for ; Wed, 7 Jun 2017 17:46:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3641B284D2; Wed, 7 Jun 2017 17:46:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CAB51284C5 for ; Wed, 7 Jun 2017 17:46:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=nR7HmYlsXuBb9QNFrIwB/e9Gng9oMAG57Xw3f9pVQkY=; b=jMapgnwDf3a9MKJUWgW2w4TBwB mGS8MHXXj9hAspwzNVJ1VmuYC7t+beMuqFTqZOY9MNNd+TEWVhXt6lIhzMshqhujOSp9vy7Ny6e4N BceucXUBqx+r5DwD2nlQeV6rg1ZfccB34aHXPq1ttyK9DOkGYUQo/6EpN1HCspCH347vjRWB4BWOQ 4whFVECqpz70Jkm5jbY7vnHMEKA4A+rQ0LEeNY1AIOFAGQ5o2/RUwuJuhKXnvN0xvIG7Zy0+JuP82 hJJQ3JSU+V4Xt0Y1COcTNVmx6+gIb9xF6jZxpqyqAzDTgMjSUoM63EbEAYXyGgU1szysEBDH3gqOz gyqWVwHA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dIf2B-0004Hh-AM; Wed, 07 Jun 2017 17:46:19 +0000 Received: from wsip-98-189-142-135.oc.oc.cox.net ([98.189.142.135] helo=office-server2) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dIf28-0004EH-1Q for linux-arm-kernel@lists.infradead.org; Wed, 07 Jun 2017 17:46:17 +0000 Received: from tkisky by office-server2 with local (Exim 4.86_2) (envelope-from ) id 1dIf1i-0008O6-OD; Wed, 07 Jun 2017 10:45:50 -0700 From: Troy Kisky To: shawn.guo@linaro.org Subject: [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for USDHCx 50Mhz and 100Mhz Date: Wed, 7 Jun 2017 10:45:42 -0700 Message-Id: <1496857542-32200-2-git-send-email-troy.kisky@boundarydevices.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496857542-32200-1-git-send-email-troy.kisky@boundarydevices.com> References: <1496857542-32200-1-git-send-email-troy.kisky@boundarydevices.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170607_104616_138225_1478BC2F X-CRM114-Status: UNSURE ( 7.52 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fabio.estevam@nxp.com, gary.bisson@boundarydevices.com, linux-arm-kernel@lists.infradead.org, Troy Kisky MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP It does not make sense that 100 Mhz pad settings would use a x2 setting and 50 Mhz would use a x4 setting, so swap. Signed-off-by: Troy Kisky --- arch/arm/boot/dts/imx7d-sdb.dts | 72 ++++++++++++++++++++--------------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts index cab9208..70dcbf4 100644 --- a/arch/arm/boot/dts/imx7d-sdb.dts +++ b/arch/arm/boot/dts/imx7d-sdb.dts @@ -590,31 +590,20 @@ pinctrl_usdhc1: usdhc1grp { fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x59 - MX7D_PAD_SD1_CLK__SD1_CLK 0x09 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 - MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */ - MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */ - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */ + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a + MX7D_PAD_SD1_CLK__SD1_CLK 0x0a + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x5a /* CD */ + MX7D_PAD_SD1_WP__GPIO5_IO1 0x5a /* WP */ + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x5a /* vmmc */ >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < - MX7D_PAD_SD2_CMD__SD2_CMD 0x59 - MX7D_PAD_SD2_CLK__SD2_CLK 0x09 - MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59 - MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59 - MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59 - MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59 - >; - }; - - pinctrl_usdhc2_100mhz: usdhc2grp_100mhz { - fsl,pins = < MX7D_PAD_SD2_CMD__SD2_CMD 0x5a MX7D_PAD_SD2_CLK__SD2_CLK 0x0a MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a @@ -624,6 +613,17 @@ >; }; + pinctrl_usdhc2_100mhz: usdhc2grp_100mhz { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x59 + MX7D_PAD_SD2_CLK__SD2_CLK 0x09 + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59 + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59 + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59 + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59 + >; + }; + pinctrl_usdhc2_200mhz: usdhc2grp_200mhz { fsl,pins = < MX7D_PAD_SD2_CMD__SD2_CMD 0x5b @@ -638,22 +638,6 @@ pinctrl_usdhc3: usdhc3grp { fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 - MX7D_PAD_SD3_CLK__SD3_CLK 0x09 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 - >; - }; - - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { - fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x5a MX7D_PAD_SD3_CLK__SD3_CLK 0x0a MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a @@ -668,6 +652,22 @@ >; }; + pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 + MX7D_PAD_SD3_CLK__SD3_CLK 0x09 + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 + >; + }; + pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x5b