From patchwork Fri Jun 23 11:13:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xie XiuQi X-Patchwork-Id: 9806269 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0B2FC60349 for ; Fri, 23 Jun 2017 11:15:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ECC9E2869D for ; Fri, 23 Jun 2017 11:15:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DDCC828749; Fri, 23 Jun 2017 11:15:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 63E612869D for ; Fri, 23 Jun 2017 11:15:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=lbrvNXH7WmK3pNDFGcB6mFN5TI/dWf97zEBVudo8QPc=; b=UoP3QKTApjDueg HS3XZ1EMSFlMBzbr6/4FW+oybOxWbaVlKSpHvo8zDySiXl9Szq0I0eE8jhFx2Xhsx3FL6KbUoQ/YM Wb2faPN2StrefoH9LF8IUGeAFeAQpXLv48Q8AJv0SgKWqijV6zcT6f7xCi8TtxtXpAkhu5WzqcZbZ Ppj149QyEFMSBYR8h2btY5SKSFUfCAIshEZsHHpkOUb+XimwCFAa4LMHNtx79BQt6Sby5sJK2iEMz lvyAPd/4B3fd5ByLq5RroxrG4XFAEqVN0X95a29MdqBLkdDubT3GnOgOXoDDIy5hBohMq7G7/qucP J6dljFLifusDXNoHjzww==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dOMYl-0001il-MF; Fri, 23 Jun 2017 11:15:31 +0000 Received: from szxga03-in.huawei.com ([45.249.212.189]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dOMYg-0000Q2-UG for linux-arm-kernel@lists.infradead.org; Fri, 23 Jun 2017 11:15:30 +0000 Received: from 172.30.72.53 (EHLO dggeml406-hub.china.huawei.com) ([172.30.72.53]) by dggrg03-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id APX66904; Fri, 23 Jun 2017 19:14:44 +0800 (CST) Received: from localhost.localdomain.localdomain (10.175.113.25) by dggeml406-hub.china.huawei.com (10.3.17.50) with Microsoft SMTP Server id 14.3.301.0; Fri, 23 Jun 2017 19:14:22 +0800 From: Xie XiuQi To: , , , Subject: [PATCH v4] trace: ras: add ARM processor error information trace event Date: Fri, 23 Jun 2017 19:13:43 +0800 Message-ID: <1498216423-127868-1-git-send-email-xiexiuqi@huawei.com> X-Mailer: git-send-email 1.8.3.1 MIME-Version: 1.0 X-Originating-IP: [10.175.113.25] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090206.594CF826.012C, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 3dce9c4c30ff336e4d9f2cf4a2ca1553 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170623_041527_876297_2D0DD952 X-CRM114-Status: GOOD ( 13.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: xiexiuqi@huawei.com, bristot@redhat.com, ard.biesheuvel@linaro.org, linux-kernel@vger.kernel.org, fu.wei@linaro.org, zhengqiang10@huawei.com, wangxiongfeng2@huawei.com, linux-arm-kernel@lists.infradead.org, shiju.jose@huawei.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add a new trace event for ARM processor error information, so that the user will know what error occurred. With this information the user may take appropriate action. These trace events are consistent with the ARM processor error information table which defined in UEFI 2.6 spec section N.2.4.4.1. --- v4: use __print_flags instead of __print_symbolic, because ARM_PROC_ERR_FLAGS might have more than on bit set. setting up default values for __entry to avoid a lot of else branches. set flags to 0 by default instead of ~0. fix a typo rename arm_proc_err to arm_proc_err_event remove "ARM Processor Error: " prefix rebase on Tyler's patchset v17 "Add UEFI 2.6 and ACPI 6.1 updates for RAS on ARM64" v3: no change v2: add trace enabled condition as Steven's suggestion. fix a typo. https://patchwork.kernel.org/patch/9653767/ --- Cc: Steven Rostedt Cc: Tyler Baicar Signed-off-by: Xie XiuQi --- drivers/ras/ras.c | 8 +++++ include/linux/cper.h | 5 ++++ include/ras/ras_event.h | 79 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 92 insertions(+) diff --git a/drivers/ras/ras.c b/drivers/ras/ras.c index 39701a5..785e25d 100644 --- a/drivers/ras/ras.c +++ b/drivers/ras/ras.c @@ -22,7 +22,14 @@ void log_non_standard_event(const uuid_le *sec_type, const uuid_le *fru_id, void log_arm_hw_error(struct cper_sec_proc_arm *err) { + int i; + struct cper_arm_err_info *err_info; + trace_arm_event(err); + + err_info = (struct cper_arm_err_info *)(err + 1); + for (i = 0; i < err->err_info_num; i++, err_info++) + trace_arm_err_info_event(err_info); } static int __init ras_init(void) @@ -42,6 +49,7 @@ static int __init ras_init(void) EXPORT_TRACEPOINT_SYMBOL_GPL(mc_event); EXPORT_TRACEPOINT_SYMBOL_GPL(non_standard_event); EXPORT_TRACEPOINT_SYMBOL_GPL(arm_event); +EXPORT_TRACEPOINT_SYMBOL_GPL(arm_err_info_event); int __init parse_ras_param(char *str) { diff --git a/include/linux/cper.h b/include/linux/cper.h index 4c671fc..17546bf 100644 --- a/include/linux/cper.h +++ b/include/linux/cper.h @@ -275,6 +275,11 @@ enum { #define CPER_ARM_INFO_FLAGS_PROPAGATED BIT(2) #define CPER_ARM_INFO_FLAGS_OVERFLOW BIT(3) +#define CPER_ARM_INFO_TYPE_CACHE 0 +#define CPER_ARM_INFO_TYPE_TLB 1 +#define CPER_ARM_INFO_TYPE_BUS 2 +#define CPER_ARM_INFO_TYPE_UARCH 3 + /* * All tables and structs must be byte-packed to match CPER * specification, since the tables are provided by the system BIOS diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h index 429f46f..c38a367 100644 --- a/include/ras/ras_event.h +++ b/include/ras/ras_event.h @@ -206,6 +206,85 @@ __entry->running_state, __entry->psci_state) ); +#define ARM_PROC_ERR_TYPE \ + EM ( CPER_ARM_INFO_TYPE_CACHE, "cache error" ) \ + EM ( CPER_ARM_INFO_TYPE_TLB, "TLB error" ) \ + EM ( CPER_ARM_INFO_TYPE_BUS, "bus error" ) \ + EMe ( CPER_ARM_INFO_TYPE_UARCH, "micro-architectural error" ) + +/* + * First define the enums in MM_ACTION_RESULT to be exported to userspace + * via TRACE_DEFINE_ENUM(). + */ +#undef EM +#undef EMe +#define EM(a, b) TRACE_DEFINE_ENUM(a); +#define EMe(a, b) TRACE_DEFINE_ENUM(a); + +ARM_PROC_ERR_TYPE + +/* + * Now redefine the EM() and EMe() macros to map the enums to the strings + * that will be printed in the output. + */ +#undef EM +#undef EMe +#define EM(a, b) { a, b }, +#define EMe(a, b) { a, b } + +#define show_proc_err_flags(flags) __print_flags(flags, "|", \ + { CPER_ARM_INFO_FLAGS_FIRST, "First error captured" }, \ + { CPER_ARM_INFO_FLAGS_LAST, "Last error captured" }, \ + { CPER_ARM_INFO_FLAGS_PROPAGATED, "Propagated" }, \ + { CPER_ARM_INFO_FLAGS_OVERFLOW, "Overflow" }) + +TRACE_EVENT(arm_err_info_event, + + TP_PROTO(const struct cper_arm_err_info *err), + + TP_ARGS(err), + + TP_STRUCT__entry( + __field(u8, type) + __field(u16, multiple_error) + __field(u8, flags) + __field(u64, error_info) + __field(u64, virt_fault_addr) + __field(u64, physical_fault_addr) + ), + + TP_fast_assign( + __entry->type = err->type; + __entry->multiple_error = ~0; + memset(&__entry->flags, 0, + sizeof(*__entry) - offsetof(typeof(*__entry), flags)); + + if (err->validation_bits & CPER_ARM_INFO_VALID_MULTI_ERR) + __entry->multiple_error = err->multiple_error; + + if (err->validation_bits & CPER_ARM_INFO_VALID_FLAGS) + __entry->flags = err->flags; + + if (err->validation_bits & CPER_ARM_INFO_VALID_ERR_INFO) + __entry->error_info = err->error_info; + + if (err->validation_bits & CPER_ARM_INFO_VALID_VIRT_ADDR) + __entry->virt_fault_addr = err->virt_fault_addr; + + if (err->validation_bits & CPER_ARM_INFO_VALID_PHYSICAL_ADDR) + __entry->physical_fault_addr = err->physical_fault_addr; + ), + + TP_printk("type: %s; count: %u; flags: %s;" + " error info: %016llx; virtual address: %016llx;" + " physical address: %016llx", + __print_symbolic(__entry->type, ARM_PROC_ERR_TYPE), + __entry->multiple_error, + show_proc_err_flags(__entry->flags), + __entry->error_info, __entry->virt_fault_addr, + __entry->physical_fault_addr) +); + /* * Non-Standard Section Report *