Message ID | 1499331330-38362-2-git-send-email-Zhiqiang.Hou@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1BFFO11FD048.mail.protection.outlook.com (10.58.145.3) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1199.9 via Frontend Transport; Thu, 6 Jul 2017 09:11:48 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id v669BeDu032515; Thu, 6 Jul 2017 02:11:44 -0700 From: Zhiqiang Hou <Zhiqiang.Hou@nxp.com> To: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <robh+dt@kernel.org>, <mark.rutland@arm.com>, <catalin.marinas@arm.com>, <will.deacon@arm.com>, <shawnguo@kernel.org>, <prabhakar.kushwaha@nxp.com> Subject: [PATCH 2/3] dts: ls1088a: add gicv3 ITS DT node Date: Thu, 6 Jul 2017 16:55:29 +0800 Message-ID: <1499331330-38362-2-git-send-email-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1499331330-38362-1-git-send-email-Zhiqiang.Hou@nxp.com> References: <1499331330-38362-1-git-send-email-Zhiqiang.Hou@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131438059082707958; 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diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index c144d06..5f35797 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -126,6 +126,15 @@ <0x0 0x0c0d0000 0 0x1000>, /* GICH */ <0x0 0x0c0e0000 0 0x20000>; /* GICV */ interrupts = <1 9 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + its: gic-its@6020000 { + compatible = "arm,gic-v3-its"; + msi-controller; + reg = <0x0 0x6020000 0 0x20000>; + }; }; timer {