From patchwork Mon Jul 17 20:25:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lunn X-Patchwork-Id: 9846065 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 18B2A60386 for ; Mon, 17 Jul 2017 20:26:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D5EA28503 for ; Mon, 17 Jul 2017 20:26:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 327C428509; Mon, 17 Jul 2017 20:26:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A811328503 for ; Mon, 17 Jul 2017 20:26:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=o9ab7N504v02Fhbs3q5GrvQZ0cdbo9MAWLdJvwtZIQM=; b=H6VMeGgeIsn2VIcVY7lc8pAGvQ gI8IFXwk3BnbvhNB4lQOF0B9ekgkOfrwvXbnSJa+Rx+mnzuoS0JmT7cYDU8BZ5WIPPSQAXUlPUr0l eGQf+IkciFDEdUFgx9hKyypPb1w0zbsXIjxHqeXOOyRdCawG1DbtKRts7kOYJcch5kYdBypieB4uD +wnZll2kfor+9y78WmpPwb6b1Mj5cUdN5jhZ8hdOSF/RweKFkuS4+qOvPqFB/ZsCBWPf0HU2sawus OgNOD8ChPuAD13a2WgKEVvpIpKcQFjkPFu1Ae6TntyemQ21VWS5E0XQHEpzrS/EiBVEeY3FRHAcC9 VozoY51w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dXCb1-0005EW-EI; Mon, 17 Jul 2017 20:26:23 +0000 Received: from vps0.lunn.ch ([178.209.37.122]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dXCao-0004iN-7D for linux-arm-kernel@lists.infradead.org; Mon, 17 Jul 2017 20:26:16 +0000 Received: from andrew by vps0.lunn.ch with local (Exim 4.84_2) (envelope-from ) id 1dXCa2-00031i-Cs; Mon, 17 Jul 2017 22:25:22 +0200 From: Andrew Lunn To: shawnguo@kernel.org Subject: [PATCH 4/5] ARM: dts: imx6: RDU2: Add Switch interrupts Date: Mon, 17 Jul 2017 22:25:03 +0200 Message-Id: <1500323104-11583-5-git-send-email-andrew@lunn.ch> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1500323104-11583-1-git-send-email-andrew@lunn.ch> References: <1500323104-11583-1-git-send-email-andrew@lunn.ch> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170717_132611_178436_2705B160 X-CRM114-Status: UNSURE ( 7.90 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nikita.yoush@cogentembedded.com, Andrew Lunn , cphealy@gmail.com, p.zabel@pengutronix.de, linux ARM , l.stach@pengutronix.de MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Marvell switch has its interrupt pin connected to a GPIO line. Wire this up in the device tree. This then allows us to use interrupts from the embedded Ethernet PHYs in the switch. Also wire them up in device tree. Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 53 ++++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi index d67bf81524a2..83f311a51cca 100644 --- a/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +++ b/arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi @@ -630,13 +630,19 @@ #size-cells = <0>; status = "okay"; - switch@0 { + switch: switch@0 { compatible = "marvell,mv88e6085"; + pinctrl-0 = <&pinctrl_switch_irq>; + pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; reg = <0>; dsa,member = <0 0>; eeprom-length = <512>; + interrupt-parent = <&gpio6>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; ports { #address-cells = <1>; @@ -645,11 +651,13 @@ port@0 { reg = <0>; label = "gigabit_proc"; + phy-handle = <&switchphy0>; }; port@1 { reg = <1>; label = "netaux"; + phy-handle = <&switchphy1>; }; port@2 { @@ -666,11 +674,48 @@ port@3 { reg = <3>; label = "netright"; + phy-handle = <&switchphy3>; }; port@4 { reg = <4>; label = "netleft"; + phy-handle = <&switchphy4>; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switchphy0: switchphy@0 { + reg = <0>; + interrupt-parent = <&switch>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + + switchphy1: switchphy@1 { + reg = <1>; + interrupt-parent = <&switch>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + }; + + switchphy2: switchphy@2 { + reg = <2>; + interrupt-parent = <&switch>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + }; + + switchphy3: switchphy@3 { + reg = <3>; + interrupt-parent = <&switch>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + }; + + switchphy4: switchphy@4 { + reg = <4>; + interrupt-parent = <&switch>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; }; }; }; @@ -891,6 +936,12 @@ >; }; + pinctrl_switch_irq: switchgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x4001b000 + >; + }; + pinctrl_tc358767: tc358767grp { fsl,pins = < MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x10