| Message ID | 1502711389-16040-3-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
> + > +&sdhi0 { > + pinctrl-0 = <&sdhi0_pins>; > + pinctrl-names = "default"; > + > + vmmc-supply = <®_3p3v>; > + vqmmc-supply = <®_3p3v>; > + cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; Just to make sure: No 1.8V and UHS support (SDR50/104)? Or is this to be tested and added later?
> -----Original Message----- > From: Wolfram Sang [mailto:wsa@the-dreams.de] > Sent: 21 August 2017 09:29 > To: Biju Das <biju.das@bp.renesas.com> > Cc: Rob Herring <robh+dt@kernel.org>; Mark Rutland > <mark.rutland@arm.com>; Simon Horman <horms@verge.net.au>; Magnus > Damm <magnus.damm@gmail.com>; Chris Paterson > <Chris.Paterson2@renesas.com>; Wolfram Sang <wsa+renesas@sang- > engineering.com>; devicetree@vger.kernel.org; linux-renesas- > soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH 2/3] ARM: dts: iwg20m: Enable SDHI0 controller > > > + > > +&sdhi0 { > > +pinctrl-0 = <&sdhi0_pins>; > > +pinctrl-names = "default"; > > + > > +vmmc-supply = <®_3p3v>; > > +vqmmc-supply = <®_3p3v>; > > +cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>; > > +status = "okay"; > > +}; > > Just to make sure: No 1.8V and UHS support (SDR50/104)? Or is this to be > tested and added later? Thanks. The current hardware doesn't support 1.8V switching for SDHI0. There is a plan to add this in future board varient, at that time we will add UHS support. Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
> > > +vmmc-supply = <®_3p3v>; > > > +vqmmc-supply = <®_3p3v>; > > > > Just to make sure: No 1.8V and UHS support (SDR50/104)? Or is this to be > > tested and added later? > > Thanks. The current hardware doesn't support 1.8V switching for SDHI0. There is a plan to > add this in future board varient, at that time we will add UHS support. I see. Thanks for the info, patch looks good to me then: Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi index ff79938..4119737 100644 --- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi +++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi @@ -9,6 +9,7 @@ */ #include "r8a7743.dtsi" +#include <dt-bindings/gpio/gpio.h> / { compatible = "iwave,g20m", "renesas,r8a7743"; @@ -42,6 +43,12 @@ groups = "mmc_data8_b", "mmc_ctrl"; function = "mmc"; }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; }; &mmcif0 { @@ -53,3 +60,13 @@ non-removable; status = "okay"; }; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; + cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>; + status = "okay"; +};
Enable the SDHI0 controller on iWave RZG1M Qseven SOM. Signed-off-by: Biju Das <biju.das@bp.renesas.com> --- arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)