Message ID | 1503553377-3646-3-git-send-email-hoeun.ryu@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NJHplPVAawGyiDxVYCHpapA9+wj++hJ1OFU3S4oNGJs=; b=OAWP5pMW1MCx+ybbtiiaXS7e4Ub32YaI+bMv5EGvgJLmZkj2e3BjJXZlPGYov1uKWa bOmwXDkatuS3uqFXrEX3u8N2BB4K84yjKv4Hv+wQC5JTz0o+T8ggcx2uJ/tdxJ9WCR1p nvzyjEDL7tyzdSch2ojlId7ssolfSE535+UlmBGyAtetckIOb5wrcRlTMCVGCBHUTGih pDu46XcMA4eqiXYmmxELagYfmqsQGM1Z5cA5Iy0AEfLSkvLZps1QecqBFeOTVM+ap7Ya 9rMZyRfvKKO2+qZ9jQgcVYfldbZtTLEKNokGaDBcv8XWL8ltN2vZzISTfWxd39myeq8O yw2g== X-Gm-Message-State: AHYfb5gRg1H6vcBGv61tkWndC8Ni+SmGjSM0Sisuopc+SPTK4BZMTANK BKoiw64uIi+IOQ== X-Received: by 10.98.133.209 with SMTP id m78mr5272783pfk.46.1503553666508; Wed, 23 Aug 2017 22:47:46 -0700 (PDT) Received: from hryu-OptiPlex-9020.corp.ad.wrs.com ([61.107.31.52]) by smtp.gmail.com with ESMTPSA id 63sm5728500pgg.44.2017.08.23.22.47.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 23 Aug 2017 22:47:46 -0700 (PDT) From: Hoeun Ryu <hoeun.ryu@gmail.com> To: Kees Cook <keescook@chromium.org>, Andrew Morton <akpm@linux-foundation.org>, Nicholas Piggin <npiggin@gmail.com>, Ingo Molnar <mingo@kernel.org>, Michal Marek <mmarek@suse.com>, Laura Abbott <labbott@redhat.com>, Al Viro <viro@zeniv.linux.org.uk>, Andy Lutomirski <luto@kernel.org>, mic@digikod.net, Russell King <linux@armlinux.org.uk>, Vladimir Murzin <vladimir.murzin@arm.com>, Heiko Carstens <heiko.carstens@de.ibm.com>, Jonathan Austin <jonathan.austin@arm.com>, Masahiro Yamada <yamada.masahiro@socionext.com>, Mark Rutland <mark.rutland@arm.com>, Peter Zijlstra <peterz@infradead.org> Subject: [RFC 2/3] arm: enable 64BIT_ATOMIC(_ALIGNED)_ACCESS on LPAE enabled machines Date: Thu, 24 Aug 2017 14:42:56 +0900 Message-Id: <1503553377-3646-3-git-send-email-hoeun.ryu@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1503553377-3646-1-git-send-email-hoeun.ryu@gmail.com> References: <1503553377-3646-1-git-send-email-hoeun.ryu@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170823_224803_525601_125B0122 X-CRM114-Status: UNSURE ( 9.85 ) X-CRM114-Notice: Please train this message. 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diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 60cdfdc..3142572 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -660,6 +660,8 @@ config ARM_LPAE bool "Support for the Large Physical Address Extension" depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \ !CPU_32v4 && !CPU_32v3 + select 64BIT_ATOMIC_ACCESS + select 64BIT_ATOMIC_ALIGNED_ACCESS help Say Y if you have an ARMv7 processor supporting the LPAE page table format and you would like to access memory beyond the
'ldrd/strd' (load/store doublewords) instructions are 64bit atomic as long as the address is 64-bit aligned on LPAE (Large Physical Address Extension) enabled architectures. This feature is to guarantee atomic accesses on newly introduced 64bit wide descriptors in the translation tables. Making 64BIT_ATOMIC_ACCESS true, some kernel codes to access 64bit variables can be optimized by omitting seqlock or the mimic of it. Also make 64BIT_ATOMIC_ALIGNED_ACCESS true, the 64bit atomic access is guarnteed only when the address is 64bit algined. Signed-off-by: Hoeun Ryu <hoeun.ryu@gmail.com> --- arch/arm/mm/Kconfig | 2 ++ 1 file changed, 2 insertions(+)